Sreekiran Samala

45nm CMOS 8Ω Class-D audio driver with 79% efficiency and 100dB SNR

Integrating audio and power management into a system-on-chip (SoC) is of interest due to reduced board area and cost. Integrated Class-D audio drivers need to drive high voltages to deliver high power across small loads; 525mW (5.8Vpp differential) across an 8Ω load working off the battery. Absence of high-voltage transistors along with high device noise (flicker), device mismatch and leakage pose design challenges in 45nm CMOS.

A 45nm CMOS near-field communication radio with 0.15A/m RX sensitivity and 4mA current consumption in card emulation mode

Near Field Communication (NFC) is an emerging technology that is penetrating the mobile phone market rapidly. Compliance to multiple NFC standards [1-3] requires designs to support wide dynamic range of field (0.15 to 12A/m), multiple data rates (1.65 to 848Kb/s), various modulation transition times (0.01 to 8usec), wide range of modulation indices (8 to 100%) and line coding techniques (Manchester, NRZ, Modified Miller and PPM). Also, support for small antenna size and very low power card emulation (tag) operation results in additional design constraints. The solution described here integrates all the NFC functions on a multi-IP connectivity SOC in 45nm CMOS.

A 28mW WCDMA/GSM/GPRS/EDGE transformer-based receiver in 45nm CMOS

A transformer-based receiver designed in 45nm CMOS that meets WCDMA, GSM, GPRS, and EDGE system requirements is presented. The receiver requires no interstage SAW filters and consumes 20mA from 1.4V. The use of a transformer at the LNA output helps achieve high linearity by lowering the voltage swing while simultaneously providing current gain. The analog back end is implemented with two cascaded gain stages and a 2nd order ΣΔ ADC. The receiver has a gain of 60dB, noise figure of 3.0dB and an IIP2 of ≫+50dBm on both I+Q channels. The die area is 1.35mm2 for 4 bands.