Steven C. Nicholes

An 8

In this paper, we demonstrate single-channel operation of the first InP monolithic tunable optical router (MOTOR) chip designed to function as the packet forwarding engine of an all-optical router. The device has eight-input and eight-output ports and is capable of 40-Gb/s operation per port with bit-error rates below 1E-9. MOTOR integrates eight wavelength-tunable differential Mach-Zehnder semiconductor optical amplifier (SOA) wavelength converters with preamplifiers and a passive 8 × 8 arrayed-waveguide grating router. Each wavelength converter employs a widely tunable sampled-grating distributed Bragg reflector (DBR) laser for efficient wavelength switching across the C band and other functions required for 40-Gb/s wavelength conversion. Active and passive regions of the chip are defined through a robust quantum well intermixing process to optimize the gain in the wavelength converters and minimize the propagation losses in passive sections of the chip. The device is one of the most complex photonic integrated circuits (PICs) reported to date, with dimensions of 4.25 mm × 14.5 mm and more than 200 functional elements integrated on-chip. We demonstrate single-channel wavelength conversion and channel switching with this device using 231 - 1 pseudorandom bit sequence (PRBS) data at 40 Gb/s. A power penalty as low as 4.5 dB was achieved with less than 2-W drive power per channel.

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The performance of relatively complex photonic integrated circuits (PICs) is now reaching such high levels that the long sought goal of realizing low-cost, -size, -weight, and -power chips to replace hybrid solutions seems to have been achieved for some applications. This tutorial traces some of the evolution of this technology that has led to an array of high-functionality InP-based PICs useful in optical sensing and communication applications. Examples of recent high-performance PICs that have arisen out of these developments are presented. Fundamental to much of this work was the development of integration strategies to compatibly combine a variety of components in a relatively simple fabrication process. For the UCSB work, this was initially based upon the creation of a single-chip widely tunable semiconductor laser that required the integration of gain, reflector, phase-tuning and absorber sections. As it provided most of the elements needed for many more complex PICs, their creation followed somewhat naturally by adding more of these same elements outside of the laser cavity using the same processing steps. Of course, additional elements were needed for some of the PICs to be discussed, but in most cases, these have been added without adding significant processing complexity. Generally, the integration philosophy has been to avoid patterned epitaxial growths, to use post-growth processing, such as quantum-well intermixing to provide multiple bandgaps, rather than multiple epitaxial regrowths, and to focus on processes that could be performed with vendor growth and implant facilities so that only basic clean room processing facilities are required.

8 InP Monolithic Tunable Optical Router (MOTOR) Packet Forwarding Chip

We demonstrate the first InP monolithic tunable optical router with error-free 40 Gbps operation per port. The device has eight wavelength converters and an 8×8 arrayed-waveguide grating router, yielding more than 200 on-chip functional elements.

High Performance InP-Based Photonic ICs—A Tutorial

Communications interconnects and networks will continue to play a large role in contributing to the global carbon footprint, especially in data center and cloud-computing applications exponential growth in capacity. Key to maximizing the benefits of photonics technology is highly functional, lower power, and large-scale photonics integration. In this paper, we report on the latest advances in the photonic integration technologies used for asynchronous optical packet switching using an example photonic integrated switched optical router, the label switched optical router architecture. We report measurements of the power consumed by the photonic circuits in performing their intended function, the electronics required to bias the photonics, processing electronics, and required cooling technology. Data is presented to show that there is room (potentially greater than 10 ×) for improvement in the router packet-forwarding plane. The purpose of this exercise is not to provide a comparison of all-optical versus electronic routers, rather to present a data point on actual measurements of the power contributions for various photonic integration technologies of an all-optical packet router that has been demonstrated and conclude, where the technology can move to reduce power consumption for high-capacity packet routing systems.

The world's first InP 8×8 monolithic tunable optical router (MOTOR) operating at 40 Gbps line rate per port

High verticality and reduced sidewall deterioration of InP/InGaAsP in Cl2/H2/Ar inductively coupled plasma etching is demonstrated for a hydrogen dominant gas mixture. Selectivity >20:1, an etch rate of 24 nm/s, and a sidewall slope angle of >89° have been measured for etch depths >7u2002μm. The Ar flow is minimized to reduce surface etch damage while increased Cl2 and H2 gas flow is shown to increase etch rate and selectivity. The high chamber pressure required for plasma ignition causes isotropic etching at the start and creates an undercut beneath the masking layer. A novel ignition scheme using a hydrogen gas “flood” is suggested and results are presented.

Integrated Photonics for Low-Power Packet Networking

Novel monolithic programmable optical filters are proposed and demonstrated. Deeply-etched waveguides are used throughout. Unit cells, incorporating a ring resonator in one arm of a Mach-Zehnder, have given programmable poles and zeros; cascaded unit cells have yielded flat-topped band-pass filter characteristics.

High verticality InP/InGaAsP etching in Cl2/H2/Ar inductively coupled plasma for photonic integrated circuits

We demonstrate a novel technique for free-carrier absorption reduction using an InP buffer layer with quantum well intermixing. Application of this technique enabled fabrication of monolithic tunable optical routers with more than 200 functions.

Programmable photonic filters fabricated with deeply etched waveguides

In this paper, we report on the latest advances in implementation of the photonic integrated circuits (PICs) required for optical routing. These components include high-speed, high-performance integrated tunable wavelength converters and packet forwarding chips, integrated optical buffers, and integrated mode-locked lasers.

Novel application of quantum well intermixing implant buffer layer to enable high-density photonic integrated circuits in InP

We present an extensive study of an ultracompact grating-based beam splitter suitable for photonic integrated circuits (PICs) that have stringent density requirements. The 10 microm long beam splitter exhibits equal splitting, low insertion loss, and also provides a high extinction ratio in an integrated coherent balanced receiver. We further present the design strategies for avoiding mode distortion in the beam splitter and discuss optimization of the widths of the detectors to improve insertion loss and extinction ratio of the coherent receiver circuit. In our study, we show that the grating-based beam splitter is a competitive technology having low fabrication complexity for ultracompact PICs.

Advanced photonic integrated technologies for optical routing and switching

This letter presents highly polarized edge light-emitting diodes with high-confinement, strained, multiple quantum-well active regions. We demonstrate +40 dB of polarization extinction along with 16 dBm of output power from an 800-mum-long centered quantum-well device. By characterizing the polarization extinction and gain of devices with different lengths and optical confinement, we show that the polarization extinction is dominated by the polarization sensitivity of the gain