Sueo Kawai

Analysis of package cracking during reflow soldering process

Package cracking that occurs in surface-mount devices that have absorbed moisture has been studied by means of a moisture-diffusion analysis of the plastic, deformation and stress analysis of the package, and measurement of some high-temperature properties of the plastic. The validity of the analysis has been confirmed by a measurement of the deformation of packages heated by infrared radiation. Several packages with different level of moisture saturation and hysteresis of moisture absorption have been heated by soldering and the occurrence of package cracking investigated. The vapor pressure and distribution of moisture content of these packages have been calculated by the present analysis. It was found that generated vapor pressure is lower than saturated vapor pressure and depends on the moisture content at the part of the plastic facing the space in which vapor pressure is generated. This example shows that it is possible to evaluate package cracking by the present analysis method quantitatively. >

Effect of lead frame material on plastic-encapsulated IC package cracking under temperature cycling

In temperature cycling tests of plastic-encapsulated ICs, cracks in the encapsulant often originate from the lower edges of the chip pads. For Alloy 42 lead frame packages, it has been shown that cracking is caused by the thermal expansion mismatch between the chip pad and the encapsulant. However, cracking in copper lead frame packages cannot be explained in the same way. In the present work, differences in the package cracking mechanisms with lead frame materials are studied both by analysis and experiment. The results of thermal stress analysis indicate that encapsulant stress in the Alloy 42 lead frame package is increased by delamination of the chip pads bottom surface. Conversely, stress in the copper lead frame package is mainly determined by delamination of the die bonding layer. The estimated mechanisms for both packages are experimentally verified by ultrasonic inspection of the chip pads bottom surfaces and thermal deformation observation of package cross sections. The effect on cracking of each packaging material is also studied to find ways to prevent cracking. Recommendations are made for lead frame, encapsulant, and die bonding materials. >

Structural effect of IC plastic package on residual stress in silicon chips

The structural effect of two types of LSI plastic packages, conventional SOJ (small-outline J-lead)-type packages and the newly developed COL (chip on lead)-type packages, on the residual stress in the silicon chip was measured using stress-sensing chips. It was found that the residual stress in the chip encapsulated in the SOJ-type package is determined by the material combinations of the package: resin, lead frame, and the die-attaching paste. The measured stress varied from 50 MPa to 150 MPa at the center of the chip surface. The residual stress in the chip encapsulated in the COL-type package, however, is mainly determined by just the mechanical characteristics of the resin. This is caused by the existence of the polymer film between the chip and the lead frame for electrical isolation. Thermal resistances of these two packages were also measured using stress-sensing chips which have temperature sensors. As outer leads laid under the silicon chip act as cooling fins, the thermal resistance of the COL-type package is about 15 degrees C/W, or 15% to 20% lower than that of the SOJ-type package.<<ETX>>

Temperature distribution in IC plastic packages in the reflow soldering process

Temperature distribution in the packages is evaluated by both experimental method and an analytical finite-element method (FEM). It is found that the FEM analysis is useful for the temperature estimation of the packages. Temperature sensors imbedded in silicon chips were used to measure the temperature distribution in the package in both the reflow soldering process and the dip-coating process. These sensor chips were encapsulated in the actual DIP (dual in-line package) type package and SOJ (small outline j-bend package) type package. Temperature distributions of these packages were measured under various soldering conditions.<<ETX>>

Reliability evaluation of electronic devices

Abstract Stresses due to thermal oxidation and film deposition processes during the fabrication of a semiconductor are analysed. The strengths of plastic encapsulants, silicon chips, bonding wires and adhesive interfaces in integrated-circuit (IC) plastic packages are evaluated using fracture mechanics and other techniques. The thermal fatigue strength of solder joints is then estimated using the fatigue test data of solder specimens and simplified modelling of IC packages.

Mechanical Reliability of Electronic Devices

Stress simulation techniques in semiconductor fabricating processes and strength evaluation techniques for electronic devices and equipment are described. Semiconductor fabricating process simulators are developed for stress analysis of thermal oxidation and film deposition processes. Strengths of plastic encapsulants, silicon chips, bonding wires and adhesive interfaces in IC plastic packages are evaluated using fracture mechanics and other techniques. Thermal fatigue strength of solder joints is evaluated using fatigue test data of solder specimens and simplified modeling of IC packages.