Sufi Zafar

The electronic conduction mechanism in barium strontium titanate thin films

In the literature, the Schottky emission equation is widely used to describe the conduction mechanism in perovskite-type titanate thin films. Though the equation provides a good fit to the leakage current data, the extracted values of the Richardson and dielectric constants are inconsistent with their experimental values. In this work, a modified Schottky equation is applied. This equation resolves the difficulties associated with the standard Schottky equation. Also, the electronic mobility in thin films of barium strontium titanate is reported.

Oxygen vacancy mobility determined from current measurements in thin Ba0.5Sr0.5TiO3 films

The current density is measured as a function of time for thin (⩽1000 A) barium strontium titanate (BST) capacitors with platinum electrodes. The current density curve shows a peak prior to the onset of resistance degradation. The peak position on the time axis varies with applied voltage and temperature. The data are explained by the theory for space-charge-limited (SCL) current transients, and the measured current is identified as ionic current associated with oxygen vacancies. Using the SCL analysis, the mobility of the oxygen vacancies is measured as a function of temperature. The mobility obtained from current measurements is shown to be compatible with the Einstein relation for mobility and diffusivity. In summary, the ionic current associated with oxygen vacancies is shown to be an important component of the measured current in thin BST films.

Investigation of bulk and interfacial properties of Ba0.5Sr0.5TiO3 thin film capacitors

In this letter, we report the results for capacitance versus frequency measurements on a set of Ba0.5Sr0.5TiO3 (BST) capacitors with platinum electrodes (Pt) and varying BST film thicknesses. The study shows that Pt/BST interfacial capacitance is independent of frequency whereas the bulk dielectric constant has a power law dependence on frequency. Also, the bulk dielectric constant is observed to decrease whereas the interfacial capacitance increases with increasing temperature. In addition, we report the dependence of dielectric dispersion on BST film thickness and temperature. Calculations are performed which provide insights into the observed dispersion effects.

(Ba,Sr)TiO3 thin films with conducting perovskite electrodes for dynamic random access memory applications

Interfaces and hence electrodes determine the performance of (Ba,Sr)TiO3 (BST) capacitors for ultralarge scale integration dynamic random access memories. Electrode materials forming a rectifying contact on BST drastically reduce the dielectric constant and hence the capacitance and charge storage density of the capacitor, when the dielectric thickness is reduced. This can limit the role of Pt as an electrode material for gigabit dynamic random access memories (DRAM). The conducting oxide, La0.5Sr0.5CoO3 (LSCO) with its perovskite structure, has structural and chemical compatibility with BST. Our results in LSCO/BST/LSCO capacitor show that the mechanism of conduction is not interface limited but predominantly bulk limited. A 75 nm BST film with LSCO electrodes shows a leakage current density of 1×10−7 A/cm2 at 1 V, 85 °C. The dielectric constant at 1 V, 105 Hz is 350, making LSCO a potential contact electrode for DRAM memories.

Investigation of hydrogen induced changes in SrBi2Ta2O9 ferroelectric films

The effect of hydrogen on strontium bismuth tantalate (SrBi2Ta2O9; SBT) ferroelectric capacitors is investigated. Using several analytical techniques such as x-ray diffraction, electron diffraction, Auger electron, scanning and transmission electron microscopies, the structural and compositional changes in the ferroelectric film are studied as a function of annealing gas and temperature. The mechanism for hydrogen induced damage to the capacitor is identified. Measurements show that the hydrogen induces both structural and compositional changes in the ferroelectric film. Hydrogen reacts with the bismuth oxide to form bismuth and the reduced bismuth diffuses out of the SBT film causing the electrodes to peel.

Resistance degradation in barium strontium titanate thin films

Experimental and modeling results for resistance degradation in thin Ba0.5Sr0.5TiO3 (BST) film capacitors with platinum (Pt) electrodes are reported. The main experimental results are as follows. Under a constant applied voltage, the current density is observed to increase with time until it reaches a maximum value. Once the maximum value is reached, the current density becomes constant with time. The barrier height at the BST/Pt (cathode) interface is observed to decrease after prolonged electrical stressing. The resistance degradation effect is observed to be reversible, particularly at elevated temperatures. Based on the experimental results, a quantitative model for resistance degradation is proposed. In this model, the increase in the current density is attributed to a decrease in the barrier height at the cathode and this decrease is assumed to have a stretched exponential dependence on time. Using experimentally determined parameters, the model calculates the current density as a function of time a...

Performance of srbi2ta2o9 for low-voltage, non-volatile memory applications

Abstract The performance of SrBi2Ta2O9 for ferroelectric non-volatile memory applications is investigated. The temperature dependence of the hysteresis loops, small signal capacitance-voltage measurements, and fatigue resistance are reported. Increasing temperature accelerates fatigue, but excellent fatigue resistance to greater than 1012 cycles is found for temperatures of 125 °C and below. The difference between current-time curves for switched and unswitched capacitors using high-speed pulse measurements indicated the availability of 5.7 μC/cm2 for 3 V memory operation.

Barium Strontium Titanate Capacitors for Embedded Dram

Long recognized as the best potential solution to the continued scaling of the onetransistor/one-capacitor standalone dynamic random access memory (DRAM) beyond a gigabit, barium strontium titanate (BST) and other high permittivity dielectrics are fast becoming enablers to embedding large amounts of memory into a high performance logic process. System requirements such as granularity, bandwidth, fill frequency, and power pose major challenges to the use of high density standalone DRAM, leading to the current push for embedded solutions where very wide buses are possible. As a result, projected embedded memory sizes are rapidly approaching that of the standalone products, and with the high wafer cost of the combined logic plus memory process, bit cell scaling is critical. The BST memory cell, with its low thermal budget processing, very high charge storage density, and high conductivity metal electrodes has the potential to be efficiently embedded with traditional logic flows if the materials and integration challenges of the required three dimensional (3D) bit cell capacitors can be solved. BST materials properties such as dielectric relaxation, interface capacitance, and resistance degradation and their impact on capacitor scaling will be reviewed along with the electrode materials issues associated with certain 3D capacitor designs. The scaling limits of BST bit cells in the deep sub-micron regime will be discussed.

Non-volatile memories using SrBi2Ta2O9 ferroelectrics

Abstract Ferroelectric non-volatile memories (FENVM) are fabricated using spin-coat and fire deposition of the SrBi2Ta2O9 layered perovskite ferroelectric. Test memories using a 2 transistor-2 capacitor bit cell, top contacts to capacitors and single level metal were fabricated. We report here on the integration and electrical characteristics of fully functional 1 Kbit test memories.

Ferroelectric nonvolatile memory technology: applications and integration challenges

Summary form only given. We discuss different integration approaches, their challenges, and problems specific to the integration of ferroelectric materials into Si-CMOS. The focus is on our ongoing integration efforts using a 1 K test vehicle with 2T/2C memory architectures in single level poly and single level metal with a 0.8 /spl mu/m front-end and a 1.2 /spl mu/m back-end. The ferroelectric capacitor module comprises Pt electrodes and a layered perovskite SrBi/sub 2/Ta/sub 2/O/sub 9/ (SBT) dielectric. The capacitor module is integrated between the CMOS front-end and the metal back-end. This approach dictates processing temperatures below 900/spl deg/C during the ferroelectric module processing and below 450/spl deg/C after the metal deposition. Oxide ceramics like SET or PZT are easily damaged in plasma processes. Examples of such process damage and recovery by oxygen anneals are discussed. Progress in patterning capacitor materials is described. Finally, the post-metal anneal dilemma of not being able to perform hydrogen (i.e. forming gas) anneals for transistor recovery is discussed. Ferroelectric capacitor properties and transistor characteristics after integration are shown.