Sushil H. Bhavnani

Thermal Challenges in Next-Generation Electronic Systems

Thermal challenges in next-generation electronic systems, as identified through panel presentations and ensuing discussions at the workshop, Thermal Challenges in Next Generation Electronic Systems, held in Santa Fe, NM, January 7-10, 2007, are summarized in this paper. Diverse topics are covered, including electrothermal and multiphysics codesign of electronics, new and nanostructured materials, high heat flux thermal management, site-specific thermal management, thermal design of next-generation data centers, thermal challenges for military, automotive, and harsh environment electronic systems, progress and challenges in software tools, and advances in measurement and characterization. Barriers to further progress in each area that require the attention of the research community are identified.

Effect of surface geometry and orientation on laminar natural convection heat transfer from a vertical flat plate with transverse roughness elements

Abstract An interferometric technique was used to determine local heat transfer coefficients for surfaces with repeated ribs and steps. The effects of parameters such as protuberance height-to-spacing ratio, conductivity of ribs, and angle of inclination were studied. It was found that heat transfer enhancement, relative to a plain vertical surface of equal projected area, was possible in laminar natural convection using transverse roughness elements of proper size and shape. In general, the stepped surfaces helped improve the heat transfer. The maximum increase in average heat transfer coefficient was 23.2% with a step pitchto-height ratio of 16. The study indicated the presence of an optimum step pitch-to-height ratio. All of the ribbed surfaces resulted in degraded heat transfer performance.

A Multiscale Model of Thermal Contact Resistance Between Rough Surfaces

A new multiscale model of thermal contact resistance (TCR) between real rough surfaces is presented, which builds on Archards multiscale description of surface roughness. The objective of this work is to construct the new model and use it to evaluate the effects of scale dependent surface features and properties on TCR. The model includes many details affecting TCR and is also fairly easy to implement. Multiscale fractal based models often oversimplify the contact mechanics by assuming that the surfaces are self-affine, the contact area is simply a geometrical truncation of the surfaces, and the pressure is a constant value independent of geometry and material properties. Concern has grown over the effectiveness of frequently used statistical rough surface contact models due to the inadequacies in capturing the true multiscale nature of surfaces (i.e., surfaces have multiple scales of surface features). The model developed in this paper incorporates several variables, including scale dependent yield strength and scale dependent spreading resistance to develop a new model that can be used to evaluate TCR. The results suggest that scale dependent mechanical properties are more influential than scale dependent thermal properties. When compared to an existing TCR model, this very inclusive model shows the same qualitative trend. Results also show the significance of capturing multiscale roughness when addressing the thermal contact resistance problem.

Formation of silicon reentrant cavity heat sinks using anisotropic etching and direct wafer bonding

A novel silicon reentrant cavity heat sink for enhanced liquid cooling of silicon multichip substances has been fabricated using a two-step anisotropic etching process followed by silicon direct wafer bonding. Cavity mouth openings ranging from 8 to 500 mu m have been batch fabricated with the two-step process. The reentrant cavities suppress the temperature overshoot normally associated with the transition between the free convection and nucleate boiling regimes of liquid immersion cooling. Nucleate boiling has been observed to occur at heater fluxes below 2 W/cm/sup 2/ for both increasing and decreasing heat flux conditions. Specific thermal contact resistances (heater fluid) of less than 0.6 K-cm/sup 2//W have been measured in Freon-22, R-113, and FC-72.<<ETX>>

Re-entrant cavity surface enhancements for immersion cooling of silicon multichip packages

The authors describe the performance of silicon re-entrant cavity structures for enhanced heat removal from substrates used in silicon multichip systems. The heat sink surface consisted of a large array of pyramidal cavities etched into the silicon using standard microelectronic fabrication techniques. Two different re-entrant cavity shapes, simple and complex, were studied. A thin-film resistive heater fabricated on a silicon substrate served as the heat source. Experiments were conducted in a pool of the dielectric liquid, refrigerant-113, which has near zero contact angles with most materials used in electronics fabrication. Tests were run for both saturated and subcooled conditions. The saturated pool boiling heat transfer characteristics of the cavity enhanced surfaces were superior to those of a plain surface, resulting in a substantial decrease in both the temperature overshoot and the incipient boiling heat flux. For the enhanced surfaces, subcooling generally resulted in an increase in incipient boiling heat flux when compared with the saturated conditions. Overall, this heat sink surface shows potential for use in the next generation of silicon multichip packaging for integrated microelectronics.<<ETX>>

Boiling Augmentation with Micro/Nanostructured Surfaces: Current Status and Research Outlook

Advances in the development of micro- and nanostructured surfaces have enabled tremendous progress in delineation of mechanisms in boiling heat transfer and have propelled the rapid enhancement of heat transfer rates. This area of research is poised to make great strides toward tailoring surface features to produce dramatically improved thermal performance. A workshop was held in April 2013 to provide a review of the current state-of-the-art and to develop near-term and long-term goals for the boiling augmentation community. A brief historical perspective and primary findings are presented in this article. Though impressive gains have been made in enhancement of boiling heat transport, there still remain several unknowns such as the mechanisms that affect critical heat flux and optimization of surfaces for boiling heat transport. The promise of improved spatial resolution of optical techniques should improve knowledge of near-surface mechanisms. Standardization of experimental test sections and procedures has emerged as a critical issue that needs to be addressed immediately.

Immersion-cooled heat sinks for electronics: insight from high-speed photography

The development of effective heat sinks for the primary heat-dissipating component of a typical portable electronics device is an ongoing challenge. Thermal management using air-cooling is limited by the inherently limited thermal properties of the coolant. Other alternatives, including liquid immersion cooling, phase-change materials, and heat pipes, may merit consideration if the basic mechanisms can be reliably predicted. This study sheds light on the nucleation characteristics of an etched cavity-enhanced surface for use in an immersion-cooled heat sink. The target application is a high-density multichip module with several heat dissipating sources. High-speed photography was used to record parameters such as bubble interactions, bubble size, departure frequency and active site density while varying the cavity spacing and heat flux. The cavities, which have a characteristic dimension of approximately 40 /spl mu/m, are arranged in a square cluster 12.7 mm on each side. It was determined that the contribution of latent heat as a heat dissipation mechanism is only minor (less than 16%). In addition, it is proposed that the latent heat dissipation percentage may be used as a thermal performance indicator. Interactions between neighboring heat sources were also studied. These interactions decreased the bubble departure frequency and thereby affected the latent heat contribution.

Effect of channel width on pool boiling from a microconfigured heat sink

Microelectronics cooling continues to be an area of great technological challenge for thermal engineers. Chip level heat fluxes of 50-100 W/cm/sup 2/ are projected for the year 2000. The problem of high flux removal from individual chips is further exacerbated by the increase in substrate packing densities. In some designs the substrates on which the chips are mounted are stacked very close together. Heat sinks designed for use in these situations therefore have to be very compact. Two-phase liquid immersion cooling of computers is becoming an increasingly favorable heat removal strategy. A re-entrant cavity heat sink has been developed to address these needs. Previous studies on this heat sink have revealed good heat transfer characteristics in fully developed nucleate boiling coupled with negligible overshoots during the transition from natural convection to pool boiling. In confined situations, the vapor generated moves through the channel formed between adjacent substrates. Bubble transport is therefore affected by the channel width. Saturated pool boiling results are presented and discussed for vertically oriented channels of widths ranging from 0.1 cm to 0.6 cm to cover typical values likely to be encountered. The heat source was a sputtered aluminum thin film heater of size 0.9 cm by 0.9 cm. The cavities were laid out over a 2.5 cm by 2.5 cm area. Testing was carried out in FC-72. It was found that the presence of a parallel plate affected the heat transfer performance adversely. >

Toward optimizing enhanced surfaces for passive immersion cooled heat sinks

Reduction in die feature-size due to improvements in microelectronics fabrication technology have increased the demands on effective thermal management. As a consequence, innovative heat removal schemes need to be explored. Immersion cooling in a dielectric fluid, despite the increased complications, continues to be studied as a possible solution. The characteristics of a surface used as a pool boiling heat sink depend on its microscopic features. This paper reports results from an investigation in which the shape and spacing of these microscopic features were studied in order to achieve improved thermal performance. The heat sources were thin-film heaters deposited in an array on a silicon wafer which was immersed in PC-72.

Cavity-induced two-phase heat transfer in silicon microchannels

Modern developments in microelectronics manufacturing and architecture continue to lead to reductions in feature sizes on microprocessor chips. The demand for faster and more powerful systems has approached the limits of conventional passive and active electronics cooling schemes. Future high-powered electronics require new and innovative heat removal methods. The research study presented in this paper is conducted in order to better understand two-phase heat transfer in a microchannel heat sink using FC-72 as the test fluid. The test section consists of an (1cm times 1cm) array of nineteen parallel microchannels etched into silicon with the following dimensions: hydraulic diameter (Dh = 253 microns) with a ratio of (L/D h= 39.52). The base of each channel contains six re-entrant type cavities spaced evenly along the length. Each cavity, measuring 20 microns in mouth size, is used to promote controlled nucleation activity. The experimental results presented include the bulk fluid temperature and pressure at the inlet and outlet. To simulate the heat generated by a typical microprocessor, a uniform heat flux was applied to the base of the channel array using a series of thin film serpentine aluminum heaters. System parameters that were varied in this study include the applied heat flux and mass flow rate