T. Mathew

Submicron scaling of HBTs

The variation of heterojunction bipolar transistor (HBT) bandwidth with scaling is reviewed. High bandwidths are obtained by thinning the base and collector layers, increasing emitter current density, decreasing emitter contact resistivity, and reducing the emitter and collector junction widths. In mesa HBTs, minimum dimensions required for the base contact impose a minimum width for the collector junction, frustrating device scaling. Narrow collector junctions can be obtained by using substrate transfer or collector-undercut processes or, if contact resistivity is greatly reduced, by reducing the width of the base ohmic contacts in a mesa structure. HBTs with submicron collector junctions exhibit extremely high f/sub max/ and high gains in mm-wave ICs. Transferred-substrate HBTs have obtained 21 dB unilateral power gain at 100 GHz. If extrapolated at -20 dB/decade, the power gain cutoff frequency f/sub max/ is 1.1 THz. f/sub max/ will be less than 1 THz if unmodeled electron transport physics produce a >20 dB/decade variation in power gain at frequencies above 110 GHz. Transferred-substrate HBTs have obtained 295 GHz f/sub T/. The substrate transfer process provides microstrip interconnects on a low-/spl epsiv//sub r/ polymer dielectric with a electroplated gold ground plane. Important wiring parasitics, including wiring capacitance, and ground via inductance are substantially reduced. Demonstrated ICs include lumped and distributed amplifiers with bandwidths to 85 GHz and per-stage gain-bandwidth products over 400 GHz, and master-slave latches operating at 75 GHz.

66 GHz static frequency divider in transferred-substrate HBT technology

We report a 66 GHz emitter coupled logic (ECL) 2:1 static frequency divider using InAlAs/InGaAs transferred-substrate HBTs. To our knowledge this is the fastest static divider reported in any semiconductor technology.

Submicron transferred-substrate heterojunction bipolar transistors with greater than 8000 GHz f/sub max/

We report submicron transferred-substrate AlInAs/GaInAs heterojunction bipolar transistors. Devices with 0.4 /spl mu/m emitter and 0.9 /spl mu/m collector widths have 17.5 dB unilateral gain at 110 GHz. Extrapolating at -20 dB/decade, the power gain cut-off frequency f/sub max/ is 820 GHz.

Transferred-substrate heterojunction bipolar transistor integrated circuit technology

Using substrate transfer processes, we have fabricated heterojunction bipolar transistors with 0.4 /spl mu/m emitter-base and collector-base junctions, minimizing RC parasitics and increasing f/sub max/ to 820 GHz, the highest yet reported for a transistor. The process provides microstrip interconnects on a low-/spl epsiv//sub /spl tau// polymer dielectric with a electroplated copper ground plane and substrate. Substrate thermal resistance is reduced 5:1 over InP. Important wiring parasitics, including wiring capacitance, ground via inductance, and IC-package ground-return inductance, are substantially reduced. Demonstrated ICs include lumped and distributed amplifiers with bandwidths to 85 GHz, master-slave flip-flops operable at over 48 GHz, and 50 GHz AGC/limiting amplifiers. Current efforts include further improvement in bandwidth, development of power devices, and demonstration of more complex mixed-signal ICs.

2-bit adder carry and sum logic circuits clocking at 19 GHz clock frequency in transferred substrate HBT technology

We report carry and sum circuits for a 2-bit adder. The 2-bit adders are designed to be part of a pipelined 2N-bit adder-accumulator. The ICs clock at a maximum of 19 GHz and were fabricated in InAlAs/InGaAs transferred substrate HBT technology. To obtain high clock rates in a design with multiple gate delays, we have employed a novel merged AND-OR logic structure using 4-level series-gated current-steering logic. Further, this logic is merged with the synchronizing latch circuit so as to minimize the overall gate delay. The 2-bit carry circuit has 250 transistors, a maximum clock frequency of 19 GHz, and dissipates 1.2 W. The sum logic circuit of a full adder was realized as a 4-level series-gated ECL XOR gate. This circuit has a maximum clocking frequency of 24 GHz, has 150 transistors and dissipates 750 mW.

InAlAs/InGaAs HBTs with simultaneously high values of F/sub /spl tau// and F/sub max/ for mixed analog/digital applications

We report the design, fabrication, and measurement of InAlAs/InGaAs heterostructure bipolar transistors (HBTs) designed for high speed digital circuits. At 0.96 V V/sub CE/ the current gain cutoff frequency, f/sub /spl tau//, is 300 GHz and the maximum frequency of oscillation, f/sub max/, is 235 GHz. This value of f/sub /spl tau//, is the highest reported for bipolar transistors. At a slightly higher V/sub CE/ bias, a high value of 295 GHz for f/sub /spl tau// and f/sub max/ were obtained simultaneously.

48 GHz digital ICs using transferred-substrate HBTs

Using substrate transfer processes, we have fabricated heterojunction bipolar transistors with submicron emitter-base and collector-base junctions, minimizing RC parasitics and increasing f/sub max/ to 500 GHz. The process also provides a microstrip wiring environment on a low-/spl epsiv//sub r/ dielectric substrate. First design iterations of ECL master-slave flip-flops exhibit 48 GHz maximum clock frequency when connected as static frequency dividers.

185 GHz monolithic amplifier in InGaAs-InAlAs transferred-substrate HBT technology

We report a single-stage tuned amplifier that exhibits a peak small signal gain of 3.0 dB at 185 GHz. To the best of our knowledge, this is the first reported HBT result for a tuned amplifier at this frequency, and the gain-per-stage compares favorably with results from HEMT technologies. The amplifier was designed in a transferred-substrate HBT technology that has exhibited record values of extrapolated f/sub max/ (>1 THz).

InP/InGaAs/InP double heterojunction bipolar transistors with 300 GHz F/sub max/

We report InP/InGaAs/InP Double Heterojunction Transistors (DHBTs) with high breakdown voltages in a substrate transfer process. A device with a 400 /spl Aring/ thick graded base, a 500 /spl Aring/ chirped superlattice base-collector grade and a 2500 /spl Aring/ thick InP collector exhibits f/sub /spl tau//=165 GHz and f/sub max/=300 GHz with breakdown voltage BV/sub CEO/=6 V at a current density, J/sub e/=1/spl middot/10/sup 5/ A/cm/sup 2/. A device with a 400 /spl Aring/ thick graded base, a 500 /spl Aring/ chirped superlattice base-collector grade and a 1500 /spl Aring/ thick InP collector exhibits f/sub /spl tau//=215 GHz and f/sub max/=210 GHz with breakdown voltage BV/sub CEO/=4 V at a current density, J/sub e/=1/spl middot/10/sup 5/ A/cm/sup 2/.

HBT MMIC 75 GHz and 78 GHz power amplifiers

We report W band MMIC power amplifiers in an InGaAs/InAlAs HBT technology. A cascode amplifier with an emitter area of 100 /spl mu/m/sup 2/ and a total die size of 0.42/spl times/0.36 /spl mu/m/sup 2/ delivers 10 dBm at 75 GHz under 1.7 dB of gain compression. A balanced amplifier composed of two such cascode cells delivers 10.7 dBm at 78 GHz under 1 dB of gain compression. A common-base amplifier delivers 9.7 dBm at 82.5 GHz under 0.8 dB of gain compression. To the best of our knowledge, these results represent the best reported power performance at W band for HBT MMIC amplifiers.