Ta-Ching Yeh

Large-scale atomistic approach to random-dopant-induced characteristic variability in nanoscale CMOS digital and high-frequency integrated circuits

Modeling of device variability is crucial for the accuracy of timing in circuits and systems, and the stability of high-frequency application. Unfortunately, due to the randomness of dopant position in device, the fluctuation of device gate capacitance is nonlinear and hard to be modeled in current compact models. Therefore, a large-scale statistically sound ldquoatomisticrdquo device/circuit coupled simulation approach is proposed to characterize the random-dopant-induced characteristic fluctuations in 16-nm-gate CMOS integrated circuits concurrently capturing the discrete-dopant-number- and discrete-dopant-position-induced fluctuations. The variations of transition time of digital circuit (inverter, NAND, and NOR gates) and high-frequency characteristic of common-source amplifier are estimated. For the digital circuits, the function-dependent and circuit-topology-dependent characteristic fluctuations resulted from random nature of discrete dopants is for the first time discussed. This study provides an insight into random-dopant- induced intrinsic timing and high-frequency characteristic fluctuations. The accuracy of the simulation technique is confirmed by the use of experimentally calibrated transistor physical model.

Reduction of discrete-dopant-induced high-frequency characteristic fluctuations in nanoscale CMOS circuit

As the dimension of semiconductor device shrunk into nanoscale, characteristic fluctuation is more pronounced, and become crucial for circuit design. Diverse approaches have been reported to investigate and suppress the random-dopant-induced fluctuations in devices. However, attention is seldom drawn to the existence of high-frequency characteristic fluctuations of active device. In this paper, intrinsic high-frequency characteristic fluctuations of the nanoscale MOSFET circuit induced by random dopants are intensively explored using an experimentally validated simulation methodology, where fluctuation suppression technique is further examined. The circuit gain, the 3 db bandwidth and the unity-gain bandwidth of the tested circuit are estimated concurrently capturing the discrete-dopant-number-and discrete-dopant-position-induced fluctuations. This study provides an insight into discrete-dopant-induced intrinsic high-frequency characteristic fluctuations and examines the potential fluctuation suppression technique for nanoscale transistor circuit.

7.3: Morphology Effect on Field Emission Property of Carbon Nanotube Emitters in Triode Structure

In this work, process variation on the field emission property of the fabricated field emission (FE) triode arrays with carbon nanotubes (CNTs) as the field emitters are explored. To fabricate the FE triode structure, nanoporous anodic aluminum oxide (AAO) thin layer was first prepared on the Si substrate, followed by the growth of vertically aligned carbon nanotubes in AAO pore channels by electron cyclotron resonance chemical vapor deposition. The SiO2 dielectric and Al gate electrode layers required for the triode structure were directly deposited on the CNTs. Reactive ion and wet etches were then used to open the FE area in the triode. We employ the finite difference time domain particle-in-cell method to calculate the structure FE property, where the results are calibrated with the collected FE current of the fabricated samples. The FE current of structure is then examined with respect to different shape, random height and angle of the CNT emitters. for symmetric shapes, like circle and square, the emission beam has been more focusing than triangle and trapezoid. The electric field of random height of CNTs is stronger than that of random angle. It is implied that the vertical CNTs has better FE property. Having the symmetric shape and vertical CNTs in triode structure benefits the FE sources for advanced flat display technologies.

Characteristic Fluctuation Dependence on Discrete Dopant for 16nm SOI FinFETs at Different Temperature

In this paper, we numerically study the discrete-dopant-induced characteristic fluctuations in 16nm silicon-on-insulator (SOI) FinFETs. For devices under different temperature condition, discrete dopants are statistically generated and positioned into the three-dimensional channel region to examine associated carrier transportation characteristics, concurrently capturing “dopant concentration variation” and “dopant position fluctuation”. Electrical characteristics’ fluctuations are growing worse when the substrate temperature increases, the standard deviation of threshold voltage increases 1.75 times when substrate temperature increases from 300K to 400K for example. This “atomistic” device simulation technique is computationally cost-effective and provides us an insight into the problem of discrete-dopant-induced fluctuation and the relation between the fluctuation and thermal effect.

Field Emission Dependence on Nanogap Separation in Surface Conduction Electron-Emitter Display

Nanogap nowadays is fascinating in surface conduction electron-emitters (SCEs) for electron sources of the flat panel displays (FPDs). Surface conduction electron-emitter display (SED) is one of new type FPDs based on the SCEs. The nanogap fabricated by focused ion beam was studied, but the extremely narrow fissure complicated its fabrication. Palladium hydrogenation nanogaps have thus been proposed as a novel surface conduction electron-emitters for it low turn-on voltage, high emission current, high focused capability, and high emission efficiency. In this work, we investigate effects of nanogap separation width of the palladium hydrogenation nanogaps on the field emission efficiency using a finite-difference time domain particle-in-cell simulation method. The result of this study shows as the gap width increases, the field emission efficiency grows due to the larger space allows the particles attracted to the anode plate instead of attracting by the opposite electrode. Moreover, the study shows the better emission efficiency can be achieved under wider gap width, which reduces the difficulty of the fabrication.

Emission efficiency dependence on the tilted angle of nanogaps in surface conduction electron-emitter

In this work, the emission efficiency of the novel surface conduction electron-emitter corresponding to tilted angles (thetas) of the driving electrode is studied numerically. Due to the small angle, the emitter apex becomes significant and induces large electric field. The large electric field then attracts more particles into vacuum and then increases the emission current. However, the structure of the driving electrode limits the electron trajectory while the angle decreases, and it reflects the portion of collected current by the anode decreases and makes a drop in emission efficiency. It shows there is the highest emission efficiency (about 37%) under an optimum angle thetas = 60deg. The result provides an insight into the relation between emission efficiency and emitter apex.

Discrete Dopant Induced Characteristic Fluctuations in 16nm Multiple-Gate SOI Devices

In this paper, we have explored the random dopant effects on the characteristics of the 16nm single- and multiple-gate SOI MOSFETs using a full-scale 3D atomistic simulation technique. For device with the same Vth, the multiple-gate devices not only provide uniform potential within devices channel, but also alter conducting path for more stable current flow. It has been estimated that the Vths flucutaion of double-, triple-, and surrounding-gate SOI MOSFETs are 2.2, 3.3, and 4 times smaller than planar one, respectively. A preliminary insight into the intrinsic fluctuation and its mechanism of immunity in multiple-gate SOI devices has been drawn.