Yi-Ting Kuo

Three-Dimensional Numerical Simulation of Switching Dynamics for Cylindrical-Shaped Phase Change Memory

Novel chalcogenide-based phase change memory (PCM) is a promising candidate for next-generation non-volatile solid-state memory technology for its high resistance contrast, better endurance and writing speeds than flash memory. PCM cell stores data by a thermally induced phase transition between conductive polycrystalline (set) and resistive amorphous (reset) states, in a thin film of chalcogenide materials, such as GeSbTe (GST) alloy. Therefore, the determination of the maximum temperature of GST material is crucial in design and technology of PCM. In this study, a three-dimensional electro-thermal time-domain simulation is conducted for dynamic thermal analysis of the cylindrical PCMs, where the structure GST is a cone with different cone angle, ranging from 90 to 45. Our preliminary result shows the relation between contact size of GST and required programming current for GST phase transition. The GST with 90 angle exhibits the smallest required programming current than the others. The angle and contact size of GST will modify the distribution of temperature and alters the maximum temperature of the GST material. This study quantitatively estimates the structure effect on phase transition of PCM and physically provides an insight into design and technology of PCMs.

Simulation‐Based Evolutionary Method in Antenna Design Optimization for WLAN and Wireless Communication Applications

In this paper, a simulation‐based optimization method for the design of antenna pattern applied for mobile broadcasting and the 802.11a WLAN is presented. Based on genetic algorithm (GA), numerical simulation, and unified optimization framework, the optimization methodology is proposed for the antenna design automation. A Z‐shaped antenna is optimized with respect to the return loss by our method. Inspired by the scenario of GA for optical proximity correction in our earlier work, we firstly partition the edges of the antenna into segments, and then adjust the movements of each segment to construct the geometry of new antenna. The external simulator is then called to simulate and evaluate the performance of the new antenna. If the simulated results meet the specific constraints, we output the optimized antenna. Otherwise, the evolutionary algorithms will enable us to search solution again. Our preliminary results confirm the robustness and efficiency of the proposed simulation‐based optimization method.

Structure Effect of Cylindrical-Shaped GeSbTe Alloy on Phase Transition in Phase Change Memory

Novel chalcogenide-based phase change memories (PCMs) are known as one of next-generation non-volatile memory technologies for its high resistance contrast, better endurance and high writing speed. PCM cell stores data by a thermally induced phase transition between crystalline to amorphous states, and thus understanding of temperature distributes within a cell and determining the programming current of phase transition are crucial in design and technology of PCM. In this study, a three-dimensional electro-thermal time-domain simulation is conducted for dynamic analysis of the cylindrical-shaped PCMs. The structure GST is a cone with different cone angle, ranging from 90deg to 45deg. The relation between contact size of nanoscale GeSbTe (GST) alloy and the required programming current for phase transition is advanced. The preliminary result shows that the GST structure with a 90deg angle exhibits the smallest required programming current, the fastest phase transition characteristic, the highest resistance contrast, and the best heat utilization efficiency. This study quantitatively estimates the structure effect on phase transition of PCM and physically provides an insight into design and technology of PCMs.

7.3: Morphology Effect on Field Emission Property of Carbon Nanotube Emitters in Triode Structure

In this work, process variation on the field emission property of the fabricated field emission (FE) triode arrays with carbon nanotubes (CNTs) as the field emitters are explored. To fabricate the FE triode structure, nanoporous anodic aluminum oxide (AAO) thin layer was first prepared on the Si substrate, followed by the growth of vertically aligned carbon nanotubes in AAO pore channels by electron cyclotron resonance chemical vapor deposition. The SiO2 dielectric and Al gate electrode layers required for the triode structure were directly deposited on the CNTs. Reactive ion and wet etches were then used to open the FE area in the triode. We employ the finite difference time domain particle-in-cell method to calculate the structure FE property, where the results are calibrated with the collected FE current of the fabricated samples. The FE current of structure is then examined with respect to different shape, random height and angle of the CNT emitters. for symmetric shapes, like circle and square, the emission beam has been more focusing than triangle and trapezoid. The electric field of random height of CNTs is stronger than that of random angle. It is implied that the vertical CNTs has better FE property. Having the symmetric shape and vertical CNTs in triode structure benefits the FE sources for advanced flat display technologies.

Automatic generation of passive equivalent circuits for broadband microstrip antennas

In this paper, we propose an efficient method for extracting passive equivalent circuits of broadband antennas. To fully automate the extraction, the vector fitting in B. Gustaven and A. Semlyen (1999) is modified such that the order of the rational approximation can be determined automatically for a given error bound. Then, the approximation is corrected by quadratic programming for enforcing passivity. The passive model is further synthesized by RLC components using algorithms in G. Antonini (2003). As a result, simulated or measured frequency responses of a broadband antenna can be fit with minimum fitting error over a wide range of frequencies.

Equivalent Circuit Extraction for Passive Devices

In this study, a minimal equivalent circuit extraction scheme is provided for passive elements such as interconnects and packages. Instead of common poles, the non-common poles are used as the dominant poles of each frequency response when approximating those frequencies into a rational form. An illustration is given to show the relation between the electrical lengths of the interconnects/packages and the corresponding dominant poles. Finally, a three-port interconnect is used to validate the proposed approach. The circuit extracted by the proposed scheme has fewer components than the circuit from the conventional scheme, and decreases the computational load of the circuit simulation.

Field Emission Dependence on Nanogap Separation in Surface Conduction Electron-Emitter Display

Nanogap nowadays is fascinating in surface conduction electron-emitters (SCEs) for electron sources of the flat panel displays (FPDs). Surface conduction electron-emitter display (SED) is one of new type FPDs based on the SCEs. The nanogap fabricated by focused ion beam was studied, but the extremely narrow fissure complicated its fabrication. Palladium hydrogenation nanogaps have thus been proposed as a novel surface conduction electron-emitters for it low turn-on voltage, high emission current, high focused capability, and high emission efficiency. In this work, we investigate effects of nanogap separation width of the palladium hydrogenation nanogaps on the field emission efficiency using a finite-difference time domain particle-in-cell simulation method. The result of this study shows as the gap width increases, the field emission efficiency grows due to the larger space allows the particles attracted to the anode plate instead of attracting by the opposite electrode. Moreover, the study shows the better emission efficiency can be achieved under wider gap width, which reduces the difficulty of the fabrication.

Emission efficiency dependence on the tilted angle of nanogaps in surface conduction electron-emitter

In this work, the emission efficiency of the novel surface conduction electron-emitter corresponding to tilted angles (thetas) of the driving electrode is studied numerically. Due to the small angle, the emitter apex becomes significant and induces large electric field. The large electric field then attracts more particles into vacuum and then increases the emission current. However, the structure of the driving electrode limits the electron trajectory while the angle decreases, and it reflects the portion of collected current by the anode decreases and makes a drop in emission efficiency. It shows there is the highest emission efficiency (about 37%) under an optimum angle thetas = 60deg. The result provides an insight into the relation between emission efficiency and emitter apex.

13.3: Novel Surface Conduction Electron Emitter (SCE) Nanogaps for Field Emission Displays

A novel nanometer scaled gap in palladium thin film strip was prepared by hydrogen absorption under high pressure conditions, and implemented in the fabrication of the surface conduction electron emitter (SCE) for flat panel display applications. The lattice constant increase in the Pd due to the phase transformation from the α-phase to the β-phase after hydrogen absorption, a large compressive stress occurred to the Pd thin film. with a proper geometric arrangement of the Pd/Pt/Ti emitter electrode of the SCE structure, a single nanogap per SCE device was prepared. Finite element analysis was carried out to study the hydrostatic stress distribution in the thin film emitter structure after Pd hydrogenation, and thereby the optimized thickness of thin film electrodes of the emitter was determined for the nanogap fabrication. The novel SCE emitter had an inclined protrusion structure on the cathode, which greatly enhance the local electrical field and improve electron beam focusing. The experimental measurement and theoretical analysis show that field emission properties of the novel SCE are superior to conventional SCE with the coplanar cathode.

Minimal Equivalent Circuit Extraction for High-Speed PCB Signal Traces Analysis

Integrated circuit manufacturing and packaging are important issues in realization of advanced electron devices and solid-state circuits. In this paper we develop a minimal equivalent circuit extraction technique for the high-speed PCB circuit design. Different from the conventional one, the state-space equation is constructed based on the separate set of poles instead of the common set of poles. Illustrating example is performed to show the validity of the proposed method. The extracted equivalent circuit from the proposed method has circuit components two times fewer than those form the conventional one. Furthermore, the circuit extraction takes simulation time four times faster than that of the conventional one.