Tae-gyun Kim

Improved 20nm device yield and gate dielectric integrity with optimized aluminum metal fill process

Titanium-aluminum (TiAl) alloys are the industry standard source for work function tuning of High-K nMOS transistors in the gate-last process architecture. When aluminum is used as a metal gate fill material, the TiAl alloy also serves as a diffusion barrier against excess aluminum migration into the work function metal and dielectric layers. However, the formation of the TiAl alloy by annealing titanium and aluminum film stack, as commonly performed in gate-last integration, is highly non-uniform due to preferential alloying across grain boundaries. In this work, we describe a failure mechanism resulting from excess aluminum diffusion due to non-uniformity in the TiAl layer, and we describe a method for improving the uniformity of the TiAl barrier formation as a solution to the failure mode. Specifically, we report our observation of the dielectric breakdown in high-voltage transistors, and resolution of this breakdown through encapsulating a thin aluminum layer between two titanium layers, forcing the complete aluminum reaction which subsequently results in a very uniform TiAl layer. While completely resolving the aforementioned dielectric breakdown, we report additional benefits of TiAl barrier uniformity improvement to parametric limited yield.