Takaaki Hirokane

Metal-Insulator-Gap-Insulator-Semiconductor structure for Biological Sensors

A metal-insulator-gap-insulator-semiconductor sensing device has been characterized in different pH solutions and with different single strand DNA solutions by capacitance-voltage measurements. The capacitance-voltage curves show the difference from pH and the difference from DNA base by hysteresis and flat band voltage shift due to mobile ionic charge in the solution. As the pH decreases, the flat band voltage shift increases in the pH range of 2.7 to 7.0. The hysteresis in the capacitance-voltage curves shows the influence of ionic charge in the solutions and the change of the sensing surface condition. The difference of the flat band voltage shift in the capacitance-voltage curves is related to the mobile ionic charge in the solutions due to pH or DNA molecules.

Characterization of Void in Bonded Silicon-on-Insulator Wafers by Controlling Coherence Length of Light Source using Near-Infrared Microscope

A void in bonded silicon-on-insulator wafers before thinning has been characterized using a near-IR microscope with an interference filter for controlling the coherence length of the light source. The visibility of interference fringes is improved by controlling the coherence length of the light. The cause of the void formation is discussed by comparing the void shape obtained from an observation image with deflection curve models of discs under a uniformly distributed load of gas molecules or under a concentrated load of a particle. It is suggested that the void is formed by gas molecules trapped in the bonded interface.

Nano-scale Characterization of Surface Defects on CMP-finished Si Wafers by Scanning Probe Microscopy Combined with Laser Light Scattering

Scanning probe microscopy has been widely used to evaluate surface microroughness on Si wafers after chemical mechanical polishing (CMP) processes. In this article, we utilize atomic force microscopy (AFM) combined with laser light scattering to detect nano-scale surface defects called microscratches on CMP-finished Si wafers. We find that most microscratches detected by the combined method are very shallow trenches with widths and depths of 80–200 nm and 0.1–0.2 nm, respectively. The dependence of scattered-light intensity on the size of microscratches agrees with theoretical calculations within one order of magnitude.

Characterization of Pinhole in Patterned Oxide Buried in Bonded Silicon-on-Insulator Wafers by Near-Infrared Scattering Topography and Transmission Microscopy

Patterned oxides buried in bonded silicon-on-insulator (SOI) wafers before thinning have been characterized by near-IR scattering topography and a microscopy combination system. Micron-scaled pinholes in patterned oxides buried in bonded SOI wafers have been observed by the scattering topography. Edges of the patterned oxides have also been observed by both scattering topography and transmission microscopy. With the combination of scattering topography and transmission and reflection microscopy, this system is effective to evaluate the visibility of patterned oxides buried in bonded SOI wafers.

Characterization of Tunneling Current through Ultrathin Silicon Dioxide Films by Different-Metal Gates Method

The tunneling currents through ultrathin silicon dioxide films from metal to silicon in the oxide thickness regime between 1.4 and 3.5 nm are characterized using different-metal gates. The energy barrier heights and the effective mass of the silicon dioxide films are determined by the curve fitting of the data calculated by the transfer matrix method with current density–oxide voltage characteristics of metal–oxide–semiconductor (MOS) diodes with aluminum or gold gates. As the oxide thickness decreases, the energy barrier height decreases and the effective mass of the silicon dioxide film increases. The difference in the energy barrier heights between aluminum–oxide and gold–oxide interfaces nearly corresponds to the flatband voltage difference multiplied by the electron charge in the capacitance–voltage curves between MOS diodes with aluminum and gold gates. This makes it possible to precisely characterize tunneling currents by a new different-metal gates method for individually determining the energy barrier heights and the effective mass using the height difference obtained from the flatband voltage difference.

Characterization of Patterned Oxide Buried in Bonded Silicon-on-Insulator Wafers by Near-Infrared Scattering Topography and Microscopy

A patterned oxide buried in bonded silicon-on-insulator (SOI) wafers before thinning has been characterized using a near-infrared scattering topography system. This system has been combined with transmission and reflection microscopy. The edge of the patterned oxide buried in the SOI wafer has been observed. Micron-scaled oxide disks formed by the focused ion beam technique in stacked SOI structures have been observed by near-infrared scattering topography. A particle has been identified to be located inside a silicon/air/silicon structure by both near-infrared and visible laser scattering topographies. The size of the particle inside the silicon/air/silicon structure has been estimated to be 0.2 µm from the intensity of scattered near-infrared light. This method has an advantage over semiconductor failure analysis in future scaled-down technologies.

Microscratches with Depths of Angstrom Order on Si Wafers Detected by Light Scattering and AFM

We investigate the cross-sectional profile of microscratches on a polished Si(001) wafer surface by a combination of laser light scattering and atomic force microscopy (AFM). AFM observations reveal that most microscratches detected by laser light scattering are very shallow trenches with widths and depths of around 100 nm and angstrom order, respectively. The dependence of scattered-light intensity on the cross-sectional area of microscratches is calculated, and it is in agreement with experimental results within 1 order of magnitude. We present the possibility of laser light scattering as a fast method of quantitatively analyzing nanoscale surface defects on polished wafers.