Tariq Jamil

The Rijndael algorithm

The Rijndael algorithm is the new advanced encryption standard (AES) approved by the US National Institute of Standards and Technology (NIST). With this algorithm supporting significantly larger key sizes than DES (data encryption standard) supports, NIST believes that the AES has the potential of remaining secure for the next few decades. In overall performance, based on the speed of encryption and decryption and on key set-up time, the Rijndael algorithm has attained top scores in tests conducted by NIST. The belief is that almost all US government agencies will shift to the AES algorithm for their data security needs in the next few years. Also, that the algorithm will find its way in smart cards and other security-oriented applications used for safely storing private information about individuals.

Towards implementation of a binary number system for complex numbers

These days computer operations involving complex numbers are most commonly performed by dealing with the real and imaginary parts separately and then accumulating their individual results to get the final result of the operation. This divide-and-conquer technique forsakes the advantages of using complex numbers in computer arithmetic and there exists a need, at least for some problems, to treat a complex number as one unit and to carry out all operations in this form. In this paper, we have analyzed various available complex bases and proposed a (-1+j)-base binary number system for complex numbers. We have discussed the arithmetic operations of two such binary numbers and outlined work which is currently underway in this area of computer arithmetic.

The complex binary number system

Conversion algorithms and arithmetic procedures for a (-1 + j)-base binary number allow a given complex number to be represented as one unit. This should simplify the operations involving complex numbers in todays microprocessors. With the division process secure, we can implement the usual algorithms for calculating functions and processes such as logarithms, exponentials and trigonometric functions Currently, work is underway to write Java applets for the algorithms. We are planning to design an arithmetic unit based on the new binary system which will then be implemented using field programmable gate arrays.

RISC versus CISC

The author carries out a comparison of CISC (complex instruction set computing) and RISC (reduced instruction set computing). The author discusses what RISC is and its shortcomings. The evolution of CISC and RISC microprocessors is then discussed and prospects for the future are examined. >

RAM versus CAM

Fifty years ago John von Neumann proposed the concept of the stored-program computer in which both instructions and data are confined within the boundaries of a storage device called memory. Today a computer architect is faced with a bewildering variety of memory-types to choose from when implementing this concept in the hardware. The most commonly used storage device is called random-access memory (RAM). That is, the process of locating a word within the storage array involves giving its address. The time needed to retrieve the word remains the same irrespective of the physical location of the word in the array. However, many data processing applications require searching items in some data structure, such as a table, stored in the memory. The established procedure to search a table is: 1) to store all the items where they can be accessed in sequence; 2) choose a sequence of addresses; 3) read the contents of memory at each address, and 4) compare the information read with the item being searched until a match occurs. This is exorbitantly time-consuming if the table is very large and/or the search algorithm is relatively inefficient. This time can be significantly reduced if the stored data can be identified for access by the content of the data itself rather than by an address. A memory unit accessed by content is called an associative memory or content addressable memory (CAM). This type of memory is accessed simultaneously and in parallel on the basis of the data content. This paper addresses the question: Is content addressability better than random-accessibility?.

An Introduction to Complex Binary Number System

The vital role of complex numbers in various electrical and computer engineering applications demands formulation of an efficient method for their representation and processing in the central processing unit of a microprocessor. Complex Binary Number System (CBNS) allows both real and imaginary parts of a complex number to be represented as a single unit (instead of two separate units as in todays microprocessors), thus allowing for faster arithmetic operations of complex numbers and increase in overall system performance. In this paper, an introduction to CBNS has been presented and various algorithms for its arithmetic operations have been outlined. Information about adder, subtract or, multiplier, and divider circuits for CBNS has been provided and avenues of future research in this arena have been identified.

An investigation into the application of linear feedback shift registers for steganography

Steganography is the art (as well as the science) of hiding information inside other innocuous data such that the very existence of the secret message is concealed from the eyes of the world. One of the techniques used in steganography to hide data behind images is called the least-significant bit (LSB) insertion wherein the LSB of each byte of the pixel of the images raster data is replaced with the single bit of the data to be hidden. This is based on the premise that the total number of bit-changes in the images raster data will be so small that the resulting stego-image will be indistinguishable to the human eye from the original image. In this paper, we propose to use random bit-sequences generated by linear feedback shift registers (LFSR) within the pixel-byte (instead of just the LSB) for the purpose of steganography. It is believed that such changes within any given pixel of the image will result in better hiding of the data and hence more secure data transmission.

Division in a binary representation for complex numbers

Computer operations involving complex numbers, essential in such applications as Fourier transforms or image processing, are normally performed in a ‘divide-and-conquer’ approach dealing separately with real and imaginary parts. A number of proposals have treated complex numbers as a single unit but all have foundered on the problem of the division process without which it is impossible to carry out all but the most basic arithmetic. This paper resurrects an early proposal to express complex numbers in a single ‘binary’ representation, reviews basic complex arithmetic and is able to provide a fail-safe procedure for obtaining the quotient of two complex numbers expressed in the representation. Thus, while an outstanding problem is solved, recourse is made only to readily accessible methods. A variety of extensions to the work requiring similar basic techniques are also identified. An interesting side-line is the occurrence of fractal structures, and the power of the ‘binary’ representation in analysing the structure is briefly discussed.

Design of a tokenless architecture for parallel computations using associative dataflow processor

The currently existing models of computation, control-flow and data-flow, have their limitations and weaknesses in utilizing parallelism adequately. A new refined model of computation, called associative dataflow, has been previously proposed in the literature which attempts to circumvent the bottlenecks inherent in conventional dataflow using associative memories. In this new model of computation, a dataflow graph is conceptually assumed to be upside-down and the computation is divided into two phases, namely the search phase and the execution phase. During the search phase, each node at the top of the hierarchy, called the parent, attempts to find the nodes connected to it in the dataflow graph, called the children. During the execution phase, the operations are carried out as in conventional dataflow paradigm. The limitations and weaknesses associated with control-flow and data-flow are described, leading to the proposed concept of associative dataflow. Simulation results of existing dataflow systems are compared with the associative dataflow model to support the fact that the new model of computation provides faster execution time and better ALU utilization than the conventional models. The design of an associative dataflow system is described by providing as much detail as can possibly be incorporated to understand the concept with reference to existing computer systems. Finally, specifications of the designed system are outlined by listing important characteristics of the associative dataflow system.

Design of Arithmetic Circuits for Complex Binary Number System

Complex numbers play important role in various engineering applications. To represent these numbers efficiently for storage and manipulation, a (−1+j)‐base complex binary number system (CBNS) has been proposed in the literature. In this paper, designs of nibble‐size arithmetic circuits (adder, subtractor, multiplier, divider) have been presented. These circuits can be incorporated within von Neumann and associative dataflow processors to achieve higher performance in both sequential and parallel computing paradigms.