Tatsuya Ishii

Test analysis apparatus and analysis method for semiconductor wafer using OBIC analysis

Method of fibricating a semiconductor device having a trench

Pressure contact chip and wafer testing device

Semiconductor memory device including junction field effect transistor and capacitor and method of manufacturing the same

OBIC observation method and apparatus therefor

DRAM device having a memory cell array of a divided bit line type

Semiconductor device with no stress generated at the trench corner portion and the method for making the same

Semiconductor memory device containing junction field effect transistor

Method for making semiconductor device with no stress generated at the trench corner portion

Semiconductor memory comprising a memory cell without a transistor