Temesghen Tekeste Habte

Combined CLT and DWT-Based ECG Feature Extractor

This chapter presents an ultra-low power ECG feature extraction engine. ECG signal represents the cardiac cycle and contains key features, such as QRS complex, P-wave, and T-wave, that provide important diagnostic information about cardiovascular diseases. The ECG feature extraction is based on combined techniques of CLT and DWT. A pipelined architecture for implementing CLT is proposed. The system was fabricated using GF-65 nm technology and consumed 642 nW only when operating at a frequency of 7.5 kHz from a supply voltage of 0.6 V. Ultra-low power consumption of the SoC made it suitable for self-powered wearable devices.

Self-Powered SoC Platform for Wearable Health Care

This chapter presents a top-level design of the first self-powered SoC platform that can predict, with high accuracy, ventricular arrhythmia before it occurs. The system provides a very high level of integration in a single chip of mainstream modules that are typically needed to build biomedical devices. Hence, the platform could help in reducing the cost in designing not only for ECG monitoring systems, but for generic low-power health care devices. The platform consists of a graphene-based sensors to acquire ECG signals, an analog front-end to amplify and digitize the ECG, a custom processor to perform feature extraction and classification, a wireless transmitter to send the data to a point of care, and an energy harvesting unit to power the whole system. The platform consumes very low power that can be completely powered by the thermal energy generated from the human body. The system is imagined to be integrated within a necklace which can be worn by a patient comfortably. Hence, it can provide a continuous monitoring of the patient’s condition and connect him directly to his doctor for immediate attention if necessary.

Introduction to Ultra-Low Power ECG Processor

This chapter introduces the book. It gives the main highlights about motivation, objectives, and challenges for ultra-low power ECG processors.

IoT for Healthcare

The Internet of Things (IoT) has enabled remote sensing and communication with various devices. In the area of healthcare, IoT has far benefits in monitoring and alerting patients. IoT healthcare is applicable in many medical instruments such as ECG monitors, glucose level sensing, and oxygen concentration detection. Advanced technological platform has facilitated its implementation though it has its own challenges.

Ultra-Low Power CAN Detection and VA Prediction

In this chapter, an ECG processor on-chip for full ECG feature extraction and cardiac autonomic neuropathy (CAN) is presented. Absolute value curve length transform (ACLT) is performed for QRS detection, whereas full feature extraction (detecting QRSon, QRSoff, P-, and T-waves) is achieved by low-pass differentiation. Proposed QRS detector attains a sensitivity of 99.37% and predictivity of 99.38%. Extracted RR interval along with QT interval enables CAN severity detector. CAN is cardiac arrhythmia usually seen in diabetic patients and have prevalent effect in sudden cardiac death. In this chapter, the first hardware real-time implementation of the CAN severity detector is proposed. Detection is based on RR variability and QT variability analysis. RR variability metrics are based on mean RR interval and RMSSD of RR interval. The proposed architecture is implemented in 65 nm technology, and it consumes only 75 nW at 0.6 V, when operating at 250 Hz. Ultra-low power dissipation of the system enables it to be integrated into wearable healthcare devices.

ACLT-Based QRS Detection and ECG Compression Architecture

In this chapter, a QRS detection architecture based on absolute value curve length transform is presented. Ultra-low power and optimized architectures are crucial for IoT devices. Moreover, optimized ECG processing architectures with an adequate level of accuracy is a necessity for IoT medical wearable devices. This chapter presents a real-time QRS detector and ECG compression architecture for energy constrained IoT healthcare wearable devices. The implementation of the proposed architectures requires adders, shifters, and comparators only, and removes the need for any multipliers. QRS detections are accomplished by using adaptive thresholds in the ACLT-transformed ECG-signal. The proposed QRS detector achieved a sensitivity of 99.37% and a predictivity of 99.38% when validated using databases acquired from Physionet. Furthermore, a lossless compression technique was incorporated into the proposed architecture that uses the ECG signal first derivative and variable-bit-length encoding. An average compression ratio of 2.05 was achieved when evaluated using the MIT-BIH database. The proposed QRS architecture was implemented using a 65 nm GF low-power process, it consumed an ultra-low power of 6.5 nW when operated at a supply of 1 V and at a frequency of 250 Hz.

Background on ECG Processing

In this chapter the basics about ECG processing are presented. First, ECG is introduced as a representation of the cardiac activity of the heart. ECG features and extraction techniques along with ECG classifiers are reviewed. Ultra-low power biomedical circuit approaches are also discussed in this chapter.

Novel logarithmic ECG feature extraction algorithm based on pan and tompkins

ECG signal is an important tool to analyze the heart operation and detect many cardiac diseases. In this paper an improved Pan and Tompkins algorithm in the log2 domain is proposed. The proposed algorithm successfully detects the QRS complex and significantly reduces noise in the ECG signal. An average sensitivity of 99.68% and predictivity of 100% was obtained using the proposed algorithm. Many normal sinus rhythm ECG signals from the Physionet MIT-BIH database were used to validate the accuracy of the proposed algorithm. The algorithm was also used to measure the average heart rate using the R-R interval, an average error of 1.05% was obtained when compared the measured heart rate with the annotated data. Due to the inherent benefits of simplifying multiplication and division calculations in the log domain, the proposed algorithm provides many benefits over traditional Pan and Tompkins when it comes to hardware realization and a low-power ASIC implementation.