Tetsuya Uchida

A 0.1-/spl mu/m delta-doped MOSFET fabricated with post-low-energy implanting selective epitaxy

A simple fabrication technology for delta-doped MOSFETs, named post-low-energy implanting selective epitaxy (PLISE) is presented. The PLISE technology needs no additional photo-lithography mask, deposition step or etching step even for CMOS devices. The only additional step is growing undoped epitaxial channel layers by UHV-CVD after the channel implantation. With this technology, delta-doped NMOSFETs with 0.1-/spl mu/m gate length were successfully fabricated. By optimizing the epi-layer thickness and the channel doping level, short-channel effects are suppressed enough to achieve 0.1-/spl mu/m gate length. Moreover, the junction capacitance at zero bias is reduced by 50%.

A highly stable SRAM memory cell with top-gated P-N drain poly-Si TFTs for 1.5 V operation

A novel memory cell has been proposed for low voltage operated, high speed and high density SRAMs. Features of this cell are (1) high performance poly-Si TFT loads utilizing bipolar action positively, and (2) a node contact structure which keeps current drivability of TFTs to the cell nodes high by the elimination of parasitic high resistance regions. The minimum operation voltage of 1.5 V has been confirmed by 0.3 /spl mu/m design rule 64 kbit SRAMs without a boosted word-line scheme.

Stable Solution Method for Viscoelastic Oxidation Including Stress-Dependent Viscosity

A new computer program that simulates viscoelastic oxidation of silicon has been developed. Since in this program a tangential procedure is used for time stepping, numerical stability has been improved, and the instability problem that arises from the incorporation of stress dependence into oxide viscosity has been resolved. Thus, oxidation-induced stresses calculated by our program using stress-dependent viscosity have reasonable magnitude over the entire device area. Moreover, in our program, volume expansion due to oxidation of silicon was treated as a dilational strain, as opposed to its treatment as a forced displacement of oxide/silicon interface or a uniaxial strain perpendicular to the interface in most previous programs. Due to this difference, our program can simulate the generation of intrinsic stress below viscous flow temperature (ca. 960°C), and as a result, stress distribution calculated by our program changes drastically at the viscous flow temperature.

A Solid-State Multicolor Light-Emitting Device Based on Ballistic Electron Excitation

It is demonstrated that a solid-state luminescent device based on ballistic electron excitation can be fabricated using blue- or red-light-emitting materials as a fluorescent film. This device is composed of an n-type Si substrate, a nanocrystalline porous polysilicon (nc-PPS) layer, an organic fluorescent film, and a semitransparent thin Au film. When a positive bias voltage higher than approximately 10 V is applied to the Au top contact, the device uniformly emits blue or red light. The light intensity sharply increases with increasing bias voltage. The measured luminescence band almost coincides with the original photoluminescence spectrum of the deposited fluorescent material. The results indicate that light emission is due to the luminescence excited by ballistic electrons generated in the nc-PPS layer under a high electric field. This device is useful for applications to multicolor ballistic lighting.

Formulation of a Viscoelastic Stress Problem Using Analytical Integration and Its Application to Viscoelastic Oxidation Simulation

Formulation of a viscoelastic stress problem adopting an analytical integration scheme, which was originally proposed by Peng and co-authors [Proc. Symp. Process Physics and Modeling in Semiconductor Technology, Manchester, 1991, p. 772; COMPEL 10 (1991) 341], is given in a complete form. This formulation includes the treatment of initial strain, an implicit solution method, and improvement of the solution by successive iteration. According to the formulation, a two-dimensional oxidation program is made. Through the calculations of oxidation of a simple test structure, it is reconfirmed that numerical instability can be improved by adopting the scheme of Peng and co-authors [Proc. Symp. Process Physics and Modeling in Semiconductor Technology, Manchester, 1991, p. 772; COMPEL 10 (1991) 341]. Other aspects of the behavior of the solution, including the dependence of the solution on the magnitude of time steps, are also shown.

Reverse Short-Channel Effects due to the Lateral Diffusion of the Point-Defects Induced by the Source/Drain Ion Implantation

A physical model of reverse short-channel effect on the threshold voltage caused by the lateral diffusion of the Frenkel pairs (interstitial-vacancy) induced by tlie ion implantation in the source/drain region is presented. Based on the process and device simulation, it is shown that the lateral diffusion of the Frenkel pairs enhances the diffusion of the channel dopant, which results in the nonuniform lateral distribution of the channel dopant and in the increase in the threshold voltage as the channel length is reduced.

Characteristics of Light Emission by Ballistic Electron Excitation in Nanocrystalline Silicon Device Formed on a p-Type Substrate

It is demonstrated that planar light emission by ballistic electron excitation is observed in a nanocrystalline porous silicon (nc-PS) device fabricated on a p-type silicon substrate and occurs in a similar way to the case of n-type substrate. The device is composed of a semitransparent thin Au film, an organic fluorescent film, the nc-PS layer, a p-type Si substrate and an ohmic back contact. When a positive bias voltage higher than 20 V is applied to the Au top contact, the diode uniformly emits green light. The light intensity sharply increases with increasing bias voltage. The measured luminescence band coincides well with the original photoluminescence spectrum of the deposited fluorescent material. A hysteresis is observed in the current-voltage and the corresponding luminescence-voltage characteristics. These optoelectronic properties suggest that the light emission is based on excitation of a fluorescent film by ballistic electrons generated in the nc-PS layer. The observed hysteresis is due to an optical feedback effect by which photoexcited electrons in the nc-PS layer participate in the ballistic transport and subsequent impact on the fluorescent film. The present result is useful for applications to functional planar light-emissive devices.

Electroluminescence Enhancement Assisted with Ballistic Electron Excitation in Nanocrystalline Silicon Diodes

The novel structure of a light-emitting device has been investigated in terms of the optical and electrical activities of nanocrystalline silicon (nc-Si). The device is composed of a semitransparent top electrode, a luminescent nc-Si layer, a bottom nc-Si layer for ballistic-transport, and a substrate. The two types of nc-Si layer are sequentially formed by electrochemical anodization under appropriate conditions. When a positive bias voltage is applied to the top electrode, electrons injected into the bottom nc-Si layer from the substrate are accelerated toward the outer surface, excite the luminescent nc-Si layer to generate electron-hole pairs, and induce visible luminescence through their radiative recombination. From the optoelectronic measurements of the fabricated devices with or without the ballistic transport layer, it is shown that the intrinsic electroluminescence (EL) of the nc-Si diode is significantly enhanced by the introduction of the ballistic excitation mode.

A Solid-State Multicolor Light-Emitting Device Based on Ballistic Electron Excitations

It is demonstrated that a solid-state luminescent device based on ballistic electron excitation can be fabricated using blue- or red-light-emitting materials as a fluorescent film. This device is composed of an n-type Si substrate, a nanocrystalline porous polysilicon (nc-PPS) layer, an organic fluorescent film, and a semitransparent thin Au film. When a positive bias voltage higher than approximately 10 V is applied to the Au top contact, the device uniformly emits blue or red light. The light intensity sharply increases with increasing bias voltage. The measured luminescence band almost coincides with the original photoluminescence spectrum of the deposited fluorescent material. The results indicate that light emission is due to the luminescence excited by ballistic electrons generated in the nc-PPS layer under a high electric field. This device is useful for applications to multicolor ballistic lighting. [DOI: 10.1143/JJAP.43.2076]

Simulation of Dopant Redistribution During Gate Oxidation Including Transient-Enhanced Diffusion Caused by Implantation Damage

Dopant redistribution during gate oxidation in metal-oxide-semiconductor (MOS) fabrication processes has been studied by secondary-ion mass spectrometry (SIMS). In the first set of experiments, dopant profiles after gate oxidation are measured and compared to those after N2 annealing. From the measured profiles, the contribution of oxidation-enhanced diffusion (OED) to the entire dopant redistribution is determined and an OED model parameter is calibrated. In the second set of experiments, samples which are subjected only to wafer loading and unloading steps are prepared and dopant profiles are measured. From the measured profiles, the magnitude of transient-enhanced diffusion (TED) which occurs during the wafer loading step is estimated and an interstitial-clustering parameter is calibrated. The parameters calibrated in this study are combined with the point-defect parameters taken from the literature, and dopant redistribution during the entire gate oxidation cycle is simulated. Calculated dopant profiles agree well with the measured SIMS profiles and show correct time dependence of TED and OED, as observed in the present experiments. In the simulations, interstitial concentration at the oxidizing Si/SiO2 interface is found to be 40 times the equilibrium concentration. The supersaturation caused by surface oxidation is small and the contribution of OED is negligible under typical gate oxidation conditions where oxide thickness is less than 100 A. Dopant profiles after gate oxidation are mainly dominated by TED. However, as oxidation proceeds, the contribution of OED increases because it continues while TED almost ends in the wafer loading step of gate oxidation. Segregation of boron in the channel region is also studied. It is found that a greater amount of boron is lost in oxidation than in N2 annealing. The effect of segregation on device characteristics is not negligible for buried-channel PMOS devices, because the threshold voltage of the devices is sensitive to the change in the amount of boron.