Thierry M. Bernard

Statistical solution to watershed over-segmentation

A region based algorithm for segmentation motivated by a parallel implementation is introduced. It is obtained by combining the watershed transform with further merging based on a statistical approach which is first independently introduced. This algorithm leads to a statistically reliable segmentation.

A neural halftoning algorithm suiting VLSI implementation

Halftoning is presented as an application where the use of simple neural networks proves to be of immediate interest. Halftoning is a nonstandard A/D conversion that is treated as an optimization problem, subject to a frequency-weighted mean-square-error (MSE) criterion. The frequency weight is implemented by means of a specific neural interconnection network based on current diffusion in resistive grids. This physical choice not only leads to a dramatically compact VLSI switch capacitor implementation, but also turns the whole process into a clean 2-D isotropic generalization of Sigma - Delta modulation. Isotropy and shift-invariance cooperate within the same halftoning process for the sake of image rendition. The performances prove equal to the deep underlying harmony between the theoretical, algorithmic, and material aspects of the procedure.<<ETX>>

From Sigma - Delta modulation to digital halftoning of images

The author present his halftoning technique as an analytical 2-D extension of Sigma - Delta modulation, which is proven to feature optimal characteristics for the halftoning problem. A particular effort is devoted to transforming the sequential expression of Sigma - Delta modulation into a parallel and dimension-independent expression. This allows a precise understanding of the halftoning action in the frequential domain, while explaining the good experimental performance of the method.<<ETX>>

A programmable VLSI retina for rough vision

A VLSI retina is a device that intimately associates an optoelectronic layer with processing facilities on a monolithic circuit. Combining acquisition and processing provides a better balance between between data flows and bandwidths. It is also expected to reveal fruitful shortcuts between microelectronic phenomena and vision-oriented information processing. Yet, except for simplistic environments and applications, analog hardware will not suffice to process and compact the raw image flow from photosensitive arrays. To solve this output problem, an on-chip array of bare boolean processors can be used to provide versatility from programmability. Since the monolithic constraint implies a memory shortage, the abilities of such a retina will be limited to a rough type of vision, but specific algorithmic techniques can cope with it. We have used shift registers with some tricky circuitry to build a minimal retina boolean processor with less than 30 transistors. The successful integration and testing of and experimentation with such a 65×76 retina are presented.

Visual Sensors with Embedded Processing Abilities

While pixel dimensions in Focal Plane Arrays (FPAs) remain lowerbounded to a few microns due to optical diffraction problems, CMOS (Complementary Metal Oxide Semiconductor) transistor size keeps on decreasing in the so-called deep submicron range. The advances in VLSI (Very Large Scale Integration) thus leaves some space for transistors in the pixel. Besides, fill factor degradation problems might be alleviated using microoptic or 3-D technologies.

Vision through the power supply of the NCP retina

As previously reported, the NCP retina is a programmable smart sensor in which images can be thresholded or halftoned and then processed in binary form by a micro-grained array processor. It is shown here that the observation of the current drawn by the NCP retina on its power supply can provide valuable global information on the observed scene. More generally, it yields an appealing solution to the generic output problem affecting artificial retinas.

Object contour tracking as inspired by the "MAD retina" paradigm

An artificial retina intimately associates an imager with processing facilities on the same VLSI circuit. We investigate how a priori structural knowledge can be exploited to analyse raw image data within such a device. Massive parallelism together with severe VLSI constraints lead to original choices regarding information representation and processing. In particular, it is explained why and how the respective potentialities of analog and digital hardware can be advantageously combined within the retina microcosm. As an exemplary application, we then concentrate on and illustrate the problem of object contour tracking.<<ETX>>

LOCAL AND ISOTROPIC ERROR DIFFUSION: WHY AND HOW?

Because binary representation of images fit well VLSI constraints, the bilevel rendition of continuous tone pictures, referred to as the halftoning problem, is likely to play soon an important role in robot vision. In the present paper, two up-to-date techniques are analysed and compared in the frequential domain, particularly with respect to the “blue noise” concept as introduced in [1]. Disagreeing with previouly presented work [1], the standard “error diffusion” technique [2] is shown both theoretically and experimentally to be a poor blue noise generator, even when randomized [1]. Fortunately, we have been able to re-express the error diffusion concept as the minimization of a frequency-weighted mean squared error (FW-MSE) between the original image and its halftoned version [3]. Under this form, the error propagation scheme turns both isotropic and local, allowing the generation of real blue noise. We have called our method “neural halftoning” [4] due to peculiar connexionnist implementation properties.