Thomas Quemerais

65-, 45-, and 32-nm Aluminium and Copper Transmission-Line Model at Millimeter-Wave Frequencies

An improved analytical model of the CMOS 65-, 45-, and 32-nm silicon technology integrated transmission line is proposed. This model is derived from previous classical ones used for printed circuits board lines. Improvements have been performed to take into account the size of integrated lines. The study is validated up to millimeter-wave frequencies for different linewidths realized with various metal levels. Accurate results allow the model to be implemented in commercial computer-aided design software commonly used for millimeter-wave designs. A comparison with commercial tools is carried out.

Hot-Carrier Stress Effect on a CMOS 65-nm 60-GHz One-Stage Power Amplifier

The effects of RF hot-carrier stress on the characteristics of 60-GHz power amplifiers (PAs) on a CMOS 65-nm process are investigated, for the first time, in this letter. A reliability study is made on a one-stage PA to validate an aging model and the degradation explanation. A drop of 16% of the gain, 17% of the 1-dB output compression point (<i>OCP</i>_{1 dB}), and 17% of the <i>P</i>_sat are measured at 60 GHz after 50 h of stress under <i>V</i>_dd = 1.65 V with <i>P</i>_in = 0 dBm and <i>V</i>_dd = 1.9 V with <i>P</i>_in = -10 dBm at 60-GHz frequency.

High-Q MOS Varactors for Millimeter-Wave Applications in CMOS 28-nm FDSOI

Accumulation MOS varactors on the low-power CMOS 28-nm fully depleted silicon on insulator (FDSOI) are presented with a minimum gate length of 43 nm. This process enable to improve the varactors quality factor (Q-factor) at high frequency, which can be employed for CMOS-based millimeter-wave (MMW) applications. Measured results up to 110 GHz show relatively high Q-factor close to 10 and relatively low series resistance for a conventional multifinger MOS varactors. The proposed MOS varactor is expected to improve the overall Q-factor of the inductor capacitor resonator (LC) tank of MMW oscillators.

Design-in-Reliable Millimeter-Wave Power Amplifiers in a 65-nm CMOS Process

A hot carrier ageing model previously validated on a one-stage 60-GHz power amplifier (PA) is demonstrated to be able to predict the degradation of the characteristic parameters for multistage high-performance millimeter-wave (mmW) PAs. The increase in the threshold voltage, the decrease in the transconductance, and the output conductance of the MOSFETs caused by hot carriers leads to a degradation in performance of the PAs. Consequently, by using this ageing model, the mmW PA lifetime can be extracted. A new PA is then designed, taking into account the ageing effects, and is shown to be reliable during ten years. This amplifier exhibits a power gain of 20 dB, an output 1-dB compression point of 12.5 dBm with 6.6% power-added efficiency, and a saturated output power of 16 dBm at 60 GHz.

Millimeter-Wave In Situ Tuner: An Efficient Solution to Extract the Noise Parameters of SiGe HBTs in the Whole 130–170 GHz Range

SiGe HBT noise parameters ( NFmin, Rn and Γopt) are for the first time extracted in the entire 130 - 170 GHz frequency range. This achievement is realized using a D-band on-chip source-pull system, which includes an impedance tuner integrated with the transistor under test. On-wafer noise power measurements on this system were performed for each tuner impedance state, from which are extracted the transistor noise parameters in the complete D-band.

Millimeter-wave characterization of Si/SiGe HBTs noise parameters featuring f T /f MAX of 310/400 GHz

High frequency noise parameters (NFmin, Rn, Bopt and Gopt) determination of Si/SiGe HBTs from STMicroelectronics B5T technology are provided for the first time in the millimeter-wave range. In this paper, an integrated tuner is used for the extraction of high frequencies noise parameters with the multi-impedance method. The designed tuner is composed an active part with a low noise amplifier (LNA) and a passive part with a high performances travelling wave digitally tunable capacitance (DTC), both in series with a transmission line design for phase shifting. Measurements exhibit a state of the art NFmin lower than 2 dB at 68 GHz for the HBT.

A 135–150 GHz frequency quadrupler with 0.5 dBm peak output power in 55 nm SiGe BiCMOS technology

A millimeter-wave frequency quadrupler implemented in BiCMOS 55 nm process from STMicroelectronics for in situ load-pull D band characterization is proposed. The circuit consists on cascaded doublers with intermediate power amplifiers to increase the output power. Two high-pass filters allow the rejection of the first and 2nd harmonics to obtain pure 4th harmonic output frequency. The measured peak output power is 0.5 dBm at 150 GHz with 14 GHz 3dB bandwidth and a DC power consumption of 0.63W. A good agreement between measurement and simulation results is observed.

A D-band tuner for in-situ noise and power characterization in BiCMOS 55 nm

A digitally controlled, 64 states tuner, for D-band in-situ noise and power characterization is demonstrated on the STMicroelectronics BiCMOS 55 nm technology. This tuner is composed of a high impedance series transmission line loaded periodically by degenerated MOS transistors operating in OFF and ON states as variable impedance device. The circuit is using traveling-wave and distributed effects that increase its bandwidth and keep a large Smith chart coverage. The total chip area is 0.5 mm2. In the 130–170 GHz frequency band, the tuner exhibits a reflection coefficient Γtuner>0.5, a S21 between −6 dB and −22 dB and its linearity is higher than 8 dBm at 150 GHz.

A G band +2 dBm balanced frequency doubler in 55 nm SiGe BiCMOS

In this paper, a new balanced frequency doubler based on a Marchand Balun with Coupled Slow-wave Coplanar Wave (CS-CPW) lines in G band is presented and analyzed. The experimental results of the frequency doubler exhibit at 174 GHz a peak output power of +2 dBm associate with a linear conversion gain of −3.8 dB, a frequency bandwidth of 160 to 190 GHz and a DC power consumption of 25 mW. This doubler is fabricated in a 55 nm SiGe BiCMOS technology from STMicroelectronics with ft/fmax 320/370 GHz respectively and an area of 1200×700 µm2 including the pads.

A D-band passive receiver with 10 dB noise figure for in-situ noise characterization in BiCMOS 55 nm

A millimeter-wave (mmW) frequency passive mixer for in-situ noise characterization in 110–170 GHz (D-band) is demonstrated using STMicroelectronics BiCMOS 55 nm technology. The circuit uses a gate-pumped MOS transistor with transmission lines filters, without any IF amplifier, allowing a direct noise characterization. This mixer is designed as a frequency down-converter, from D-band frequency to 1 GHz, enabling the noise power measure to fall within the baseband frequency of standard noise figure meter. In the 150 – 162 GHz band, the mixer exhibits conversion gain (CG) between −12.8 dB and −9.8 dB with a minimum noise figure (NF) of 10 dB for a 3.2 dBm LO power. The chip size is 1.1 × 0.4 mm2 including DC/RF pads.