Thomas R. Toms

Soft-defect detection (SDD) technique for a high-reliability CMOS SRAM

A complete data retention test of a CMOS SRAM array accomplished at room temperature using the soft-defect detection (SDD) technique is reported. The SDD technique uses a connectivity analysis and cell-array current test to detect physical open faults that can cause data retention failures. An extensive circuit analysis was made to establish the operation theory and special circuit design features required for SDD. Complete SDD circuits have been developed and implemented into a 16 K CMOS SRAM module for a 32-b microcontroller. Full operation and effectiveness of the SDD technique were verified from a special experimental 16 K CMOS RAM module with built-in defective cells. the SDD technique can accomplish not only the retention test at room temperature, but also the detection of other defects that were heretofore impractical to detect using the conventional retention test technique of high-temperature bakes and functional tests. >

A 512-kb flash EEPROM embedded in a 32-b microcontroller

A 512-kb flash EEPROM developed for microcontroller applications is reported. Many process and performance constraints associated with the conventional flash EEPROM have been eliminated through the development of a new flash EEPROM cell and new circuit techniques. Design of the 512-kb flash EEPROM, which is programmable for different array sizes, has been evaluated from 256- and 384-kb arrays embedded in new 32-b microcontrollers. The 512-kb flash EEPROM has incorporated the newly developed source-coupled split-gate (SCSG) flash EEPROM cell, Zener-diode controlled programming voltages, internally generated erase voltage, and a new differential sense amplifier. It has eliminated overerase and program disturb problems without relying on tight process controls and on critical operational sequences and timings, such as intelligent erase, intelligent program, and preprogram before erase. A modular approach was used for chip design to minimize development time and for processing technology to achieve high manufacturability and flexibility. >

New submicron non-volatile memory modules for 16/32-bit devices

Development of new submicron non-volatile memory modules, including an EEPROM with unique programmable redundancy and a block erasable flash EEPROM, for 16-bit and 32-bit devices is reported. Optional process modules required for the non-volatile memories are developed for integration into the baseline logic process based on 0.65 mu double metal CMOS technology.<<ETX>>

A 32 bit microcontroller with an embedded flash EEPROM

The development of a versatile 32 bit microcontroller containing various peripheral functional modules including a 512 K bit flash EEPROM is described. A modular process approach was employed to integrate high voltage transistors and flash EEPROM cells into the baseline 08 mu m twin well double metal CMOS process. A modular circuit design approach was utilized to simplify chip design and to reduce development time.<<ETX>>