Tobias Tired

A 9-band WCDMA/EDGE transceiver supporting HSPA evolution

The future of cellular radio ICs lies in the integration of an ever-increasing number of bands and channel bandwidths. Figure 21.2.1 shows the block diagram of our transceiver, together with the associated discrete front-end components. The transceiver supports 4 EDGE bands and 9 WCDMA bands (I-VI and VIII-X), while the radio can be configured to simultaneously support the 4 EDGE bands and up to 5 WCDMA bands: 3 high bands (HB) and 2 low bands (LB). The RX is a SAW-less homodyne composed of a main RX and a diversity RX. To reduce package complexity with so many bands, we chose to minimize the number of ports by using single-ended RF interfaces for both RX and TX. This saves several package pins, but requires careful attention to grounding. The main RX has 8 LNA ports and the diversity RX has 5, with some LNAs supporting multiple bands. On the TX side, 2 ports are used for all EDGE bands and 4 for the WCDMA bands.

Highly integrated direct conversion receiver for GSM/GPRS/EDGE with on-chip 84-dB dynamic range continuous-time /spl Sigma//spl Delta/ ADC

This paper describes a highly digitized direct conversion receiver of a single-chip quadruple-band RF transceiver that meets GSM/GPRS and EDGE requirements. The chip uses an advanced 0.25-/spl mu/m BiCMOS technology. The I and Q on-chip fifth-order single-bit continuous-time sigma-delta (/spl Sigma//spl Delta/) ADC has 84-dB dynamic range over a total bandwidth of /spl plusmn/135 kHz for an active area of 0.4 mm/sup 2/. Hence, most of the channel filtering is realized in a CMOS IC where digital processing is achieved at a lower cost. The systematic analysis of dc offset at each stage of the design enables to perform the dc offset cancellation loop in the digital domain as well. The receiver operates at 2.7 V with a current consumption of 75 mA. A first-order substrate coupling analysis enables to optimize the floor plan strategy. As a result, the receiver has an area of 1.8 mm/sup 2/.

A Miniaturized Marchand Balun in CMOS With Improved Balance for Millimeter-Wave Applications

The analysis and design of a millimeter-wave passive balun on silicon substrate with small size and good balance is presented. The reason for the imbalance of the balun is analyzed and a novel method using two grounded T bars beneath the coupled lines to tune the balance is proposed. The balun was fabricated in a 65 nm CMOS process, by using broadside coupled lines with small separation, the length of balun is reduced, resulting in a size of only 0.01 mm2. In the 57-67 GHz band, the measured amplitude imbalance is less than 0.5 dB and the phase imbalance is less than 1 °. This method for optimizing the imbalance of balun is efficient and it does not increase the size of balun.

A 1.5 V 28 GHz Beam Steering SiGe PLL for an 81-86 GHz E-Band Transmitter

This letter presents measurement results for a low supply voltage 28 GHz beam steering PLL, designed in a SiGe bipolar process with fT = 200 GHz. The PLL, designed around a QVCO, is intended for a beam steering 81-86 GHz E-band transmitter. Linear phase control is implemented by variable current injection into a Gilbert type phase detector, with a measured nominal phase control sensitivity of 2.5 °/μA. The demonstrated LO generation method offers great advantages in the implementation of beam steering mm-wave transmitters, since only the low frequency PLL reference signal of 1.75 GHz needs to be routed across the chip to the different transmitters. Except for an active loop filter, used to extend the locking range of the PLL, the design uses a low supply voltage of 1.5 V. The PLL obtains a measured in band phase noise of -107 dBc/Hz at 1 MHz offset. The power consumption equals 54 mW from the 1.5 V supply plus 1.8 mW for the variable supply of the active low pass filter.

A 28 GHz SiGe QVCO with an I/Q phase error detector for an 81–86 GHz E-band transceiver

This paper presents a 28 GHz QVCO intended to be used in an 81-86 GHz E-band transceiver. E-band transceivers using e.g. 16 QAM modulation schemes are sensitive to I/Q phase error. Already a three degree error significantly degrades the bit error rate, and careful control of the phase error of the 28 GHz QVCO is therefore required. In the presented design the phase error can be tuned using four varactors, each connected to one of the QVCO outputs. The phase error is detected in two cross-coupled active mixers, creating a DC-level proportional to the phase error. The accuracy of the detector has been verified by Monte Carlo simulations showing a 3 sigma phase error of one degree. The QVCO is designed in a SiGe process with fT = 200 GHz. The current consumption is 14 mA from a 1.5 V supply and 57 mA from a 2.5 V supply. The 2.5 V supply is dedicated to the detector and output buffers. At 1 MHz offset the phase noise equals -105 dBc/Hz with a FOM of -181 dBc/Hz and a FOMT of -186 dBc/Hz. The die area equals 1.3 mm2.

A 1V SiGe power amplifier for 81–86 GHz E-band

This paper presents an architecture for a SiGe E-band power amplifier using a stacked transformers for output power combination. According to simulations, at E-band frequencies, the power combiner consisting of two individual single turn transformers performs significantly better compared to a single common 2:1 transformer with two turns on the secondary side. The power combination allows for a low supply voltage of 1 V, which is beneficial since the supply can be shared between the power amplifier and the transceiver thereby eliminating the need of a separate voltage regulator. To improve the gain of the two-stage amplifier it employs a capacitive cross-coupling technique not yet seen in mm-wave SiGe PAs. The PA is designed in a SiGe process with fr = 200 GHz and achieves a power gain of 12dB, a saturated output power of 16dBm and a 14% peak PAE.

Comparison of two SiGe 2-stage E-band power amplifier architectures

This paper presents simulation and measurement results for two 2-stage E-band power amplifiers implemented in 0.18 μm SiGe technology with fr = 200 GHz. To increase the power gain by mitigating the effect of the base-collector capacitance, the first design uses a differential cascode topology with a 2.7 V supply voltage. The second design instead uses capacitive cross-coupling of a differential common emitter stage, previously not demonstrated in mm-wave SiGe PAs, and has a supply voltage of only 1.5 V. Low supply voltage is advantageous since a common supply can then be shared between the transceiver and the PA. To maximize the power gain and robustness, both designs use a transformer based interstage matching. The cascode design achieves a measured power gain, S21, of 16 dB at 92 GHz with 17 GHz 3-dB bandwidth, and a simulated saturated output power, Psat, of 17 dBm with a 16% peak PAE. The cross-coupled design achieves a measured S21 of 10 dB at 93 GHz with 16 GHz 3-dB bandwidth, and a simulated Psat, of 15 dBm with 16% peak PAE. Comparing the measured and simulated results for the two amplifier architectures, the cascode topology is more robust, while the cross-coupled topology would benefit from a programmable cross-coupling capacitance.

A 28 GHz SiGe QVCO and divider for an 81–86 GHz E-band beam steering transmitter PLL

This paper presents a QVCO and divider for a 28 GHz SiGe PLL. It was designed in a SiGe process with fT= 200 GHz. The PLL is intended to be used for beam steering in an 81-86 GHz E-band transmitter. Phase control is implemented by programmable current injection into the loop filter. The simulations in Spectre use a layout extracted view with parasitics for the QVCO and the frequency divider and an ADS Momentum model for the QVCO inductors. The divider is implemented with four cascaded current-mode-logic (CML) blocks, for a reference frequency of 1.75 GHz. The low frequency parts of the PLL were represented with either Verilog-A or schematic models. The phase noise of the QVCO equals -105 dBc/Hz at 1MHz offset, while at the same offset the divider standalone has an input referred phase noise of -110 dBc/Hz. The phase control has been verified by transient simulations showing a phase control sensitivity of 1.5°/μA over a range exceeding 360°. With a supply of 1.5 V the QVCO and divider consumes 29 mA.

A broadband SiGe Power Amplifier for E-band communication applications

This work presents a broadband SiGe Power Amplifier (PA) for operation between 60-90 GHz covering both 71-76 GHz and 81-86 GHz E-Band sub-bands. It consists of a two-stage differential cascode amplifier using an LC-interstage matching network in the interface between the stages. Single-ended to differential conversion is accomplished by the use of two stacked 1-to-1 transformers, achieving a simulated insertion loss of 0.63 dB and 0.45 dB at input and output, respectively. The design has been implemented using Infineon B7HF200 0.18 pm SiGe HBT process with fp/fmax 200/250 GHz. Measured performance indicates that the PA delivers 12.6 dBm saturated output power (Psat) with 4.6% peak Power Added Efficiency (PAE) at 84 GHz while providing at least 6 dB of gain covering a frequency range from 62 to 90 GHz. The circuit consumes 102 mA from a 2.8 V power supply and occupies an area of 0.105 mm2.

Single-ended low noise multiband LNA with programmable integrated matching and high isolation switches

This paper describes a novel 90nm single-ended multiband input LNA preceded by RF input switches connected to an on-chip balun intended to drive a differential mixer. The architecture achieves a low noise figure of 1.8dB. The advantage with the proposed architecture is that it is fully single-ended with on-chip programmable narrow-band matching eliminating the need of off-chip components. Especially in multiband integrated radios a single-ended LNA is highly desirable since the pin-count for the LNAs is reduced by half compared with a differential architecture. The PCB routing of the RF input signal is simplified. Narrow-band matching is advantageous compared to common broadband matching since this adds attenuation of out of band interferers and suppresses conversion of 3rd LO harmonic. This is important for the coexistence of cellular systems with e.g. WLAN 802.11a operating in the 5GHz band.