Toby Xu

Single-chip CMUT-on-CMOS front-end system for real-time volumetric IVUS and ICE imaging

Intravascular ultrasound (IVUS) and intracardiac echography (ICE) catheters with real-time volumetric ultrasound imaging capability can provide unique benefits to many interventional procedures used in the diagnosis and treatment of coronary and structural heart diseases. Integration of capacitive micromachined ultrasonic transducer (CMUT) arrays with front-end electronics in single-chip configuration allows for implementation of such catheter probes with reduced interconnect complexity, miniaturization, and high mechanical flexibility. We implemented a single-chip forward-looking (FL) ultrasound imaging system by fabricating a 1.4-mm-diameter dual-ring CMUT array using CMUT-on-CMOS technology on a front-end IC implemented in 0.35-μm CMOS process. The dual-ring array has 56 transmit elements and 48 receive elements on two separate concentric annular rings. The IC incorporates a 25-V pulser for each transmitter and a low-noise capacitive transimpedance amplifier (TIA) for each receiver, along with digital control and smart power management. The final shape of the silicon chip is a 1.5-mm-diameter donut with a 430-μm center hole for a guide wire. The overall front-end system requires only 13 external connections and provides 4 parallel RF outputs while consuming an average power of 20 mW. We measured RF A-scans from the integrated single- chip array which show full functionality at 20.1 MHz with 43% fractional bandwidth. We also tested and demonstrated the image quality of the system on a wire phantom and an ex vivo chicken heart sample. The measured axial and lateral point resolutions are 92 μm and 251 μm, respectively. We successfully acquired volumetric imaging data from the ex vivo chicken heart at 60 frames per second without any signal averaging. These demonstrative results indicate that single-chip CMUT-on-CMOS systems have the potential to produce realtime volumetric images with image quality and speed suitable for catheter-based clinical applications.

Monolithic CMUT-on-CMOS integration for intravascular ultrasound applications

One of the most important promises of capacitive micromachined ultrasonic transducer (CMUT) technology is integration with electronics. This approach is required to minimize the parasitic capacitances in the receive mode, especially in catheter-based volumetric imaging arrays, for which the elements must be small. Furthermore, optimization of the available silicon area and minimized number of connections occurs when the CMUTs are fabricated directly above the associated electronics. Here, we describe successful fabrication and performance evaluation of CMUT arrays for intravascular imaging on custom-designed CMOS receiver electronics from a commercial IC foundry. The CMUT-on-CMOS process starts with surface isolation and mechanical planarization of the CMOS electronics to reduce topography. The rest of the CMUT fabrication is achieved by modifying a low-temperature micromachining process through the addition of a single mask and developing a dry etching step to produce sloped sidewalls for simple and reliable CMUT-to-CMOS interconnection. This CMUT-to-CMOS interconnect method reduced the parasitic capacitance by a factor of 200 when compared with a standard wire-bonding method. Characterization experiments indicate that the CMUT-on-CMOS elements are uniform in frequency response and are similar to CMUTs simultaneously fabricated on standard silicon wafers without electronics integration. Ex- periments on a 1.6-mm-diameter dual-ring CMUT array with a center frequency of 15 MHz show that both the CMUTs and the integrated CMOS electronics are fully functional. The SNR measurements indicate that the performance is adequate for imaging chronic total occlusions located 1 cm from the CMUT array.

CMUT-on-CMOS for forward-looking IVUS: Improved fabrication and real-time imaging

The capability to monolithically integrate CMUTs with underlying front-end electronics is promising for forward-looking (FL) imaging catheters with improved SNR and smaller size. We previously demonstrated feasibility of CMUT-on-CMOS arrays for FL imaging and obtained pulse-echo results from individual elements. Here we describe recent improvements in the fabrication process and initial results from a test setup capable of real-time image data collection using CMUT-on-CMOS arrays. Dual-ring CMUT arrays were fabricated on silicon wafers with 0.35 µm CMOS front-end electronics processed at a commercial foundry. The critical changes made in the fabrication process involved in-house polishing followed by a chemical stripping of the aluminum oxide slurry. We also added 0.2 µm of silicon nitride before CMUT to CMOS interconnect via etching. We made these modifications to improve surface quality, alleviating wirebonding stiction issues. The real-time imaging test setup uses an FPGA to control Tx/Rx element selection and data collection functions. The Tx electronics are capable of generating high voltage, broadband, bipolar pulses up to 100V in amplitude. The 4 Rx channels coming out of the CMUT-on-CMOS chip are simultaneously digitized using a 14 bit 250 MS/s digitizer. 12 MHz dual-ring CMUT-on-CMOS arrays were used for real-time imaging of various targets. The results show that these arrays, coupled with an FPGA controlled data acquisition system, can produce true volumetric images in front of the array in real time.

CMUTs with high-K atomic layer deposition dielectric material insulation layer

Use of high-κ dielectric, atomic layer deposition (ALD) materials as an insulation layer material for capacitive micromachined ultrasonic transducers (CMUTs) is investigated. The effect of insulation layer material and thickness on CMUT performance is evaluated using a simple parallel plate model. The model shows that both high dielectric constant and the electrical breakdown strength are important for the dielectric material, and significant performance improvement can be achieved, especially as the vacuum gap thickness is reduced. In particular, ALD hafnium oxide (HfO2) is evaluated and used as an improvement over plasma-enhanced chemical vapor deposition (PECVD) silicon nitride (SixNy) for CMUTs fabricated by a low-temperature, complementary metal oxide semiconductor transistor-compatible, sacrificial release method. Relevant properties of ALD HfO2 such as dielectric constant and breakdown strength are characterized to further guide CMUT design. Experiments are performed on parallel fabricated test CMUTs with 50-nm gap and 16.5-MHz center frequency to measure and compare pressure output and receive sensitivity for 200-nm PECVD SixNy and 100-nm HfO2 insulation layers. Results for this particular design show a 6-dB improvement in receiver output with the collapse voltage reduced by one-half; while in transmit mode, half the input voltage is needed to achieve the same maximum output pressure.

Real-time imaging system using a 12-MHz forward-looking catheter with single chip CMUT-on-CMOS array

Forward looking (FL) imaging catheters would be an important tool for several intravascular ultrasound (IVUS) and intracardiac echocardiography (ICE) applications. Single chip capacitive micromachined ultrasonic transducer (CMUT) arrays fabricated on front-end CMOS electronics with simplified electrical interconnect have been previously developed for highly flexible and compact catheters. In this study, we present a custom built real time imaging system utilizing catheters with single chip CMUT-on-CMOS arrays and show initial imaging results. The fabricated array has a dual-ring structure with 64 transmit (Tx) and 56 receive (Rx) elements. The CMUT arrays fit on a 2.1 mm diameter circular region with all the required front-end electronics. The device operates at 12 MHz center frequency and has around 20 V collapse voltage. The single-chip system requires 13 external connections including 4 Rx channels and power lines. The electrical connections to micro cables in the catheter are made from the top side of the chip using polyimide flex tapes. The device is placed on a 6-Fr catheter shaft and secured with a medical grade silicon rubber. For real time data acquisition, we developed a custom design FPGA based imaging platform to generate digital control sequences for the chip and collect RF data from Rx outputs. We performed imaging experiments using wire phantoms immersed in water to test the real time imaging system. The system has the potential to generate images at 32 fps rate with the particular catheter. The overall system is fully functional and shows promising image performance.

Design, modeling and characterization of a 35MHz 1-D CMUT phased array

High frequency ultrasound arrays have applications ranging from imaging of small animals, skin and eye to intravascular ultrasound (IVUS). We describe an application where a guidewire IVUS system uses high frequency phased arrays with integrated electronics placed directly on the guidewire rather than a catheter for imaging. Multiple arrays provide the full transverse cross section of the artery during percutaneous interventions. We focus on a 1-D CMUT phased array to be used in the guidewire IVUS. CMUTs are particularly suitable for this application with their ease of fabrication and single chip electronics integration. The array frequency is chosen to be around 35-40MHz with 10MHz bandwidth so that the 1-D CMUT phased array with a 300um wide aperture can closely match the lateral resolution of a current 20MHz, 3.5F solid state IVUS array. Here we discuss the initial design, large signal modeling, fabrication and experimental characterization of a 12 element, 300×1000um CMUT array with 25um pitch. The electrical and acoustic characterization results for a CMUT array with 20um square membranes are presented. Modeling results for different size membranes indicating adequate performance for higher bandwidth applications are also discussed.

Reactor pressure - growth temperature relation for InN epilayers grown by high-pressure CVD

Results on the achievable growth temperature as a function of the reactor pressure for the growth of InN by high-pressure CVD are presented. As the reactor pressure was increased from 1 bar to 19 bar, the optimal growth temperature raised from 759°C to 876°C, an increase of 6.6 °C/bar. The InN layers were grown in a horizontal flow channel reactor, using a pulsed precursor injection scheme. The structural and optical properties of the epilayers have been investigated by Raman spectroscopy, X-ray diffraction, and IR reflectance spectroscopy.

Improved performance CMUT-on-CMOS devices using ALD hafnium oxide insulation layer

Higher transmit sensitivity and receive sensitivity at lower bias voltages would be achieved by CMUTs when their structure converges to an ideal parallel plate structure without an insulation layer. Using an insulation layer with high relative dielectric constant (high-K) helps achieving this goal with increased capacitance and large electric field in the vacuum gap. The effect of the insulation layer is more pronounced for high frequency, small gap CMUTs, where large pressures can be generated with smaller displacements. In this paper, we present a simple model for optimal insulation layer properties and significant improvement in both transmit and receive sensitivity by replacing the silicon nitride (SixNy) insulation layer with high-K hafnium oxide (HfO2) for a low temperature CMUT-on-CMOS process. Experiments are performed on parallel fabricated test CMUTs with 50-nm gap and 16.5-MHz center frequency to measure and compare pressure output and receive sensitivity for PECVD SixNy and HfO2 insulation layers. Results for this particular design show 6-dB improvement in receive sensitivity (V/Pa) with the collapse voltage reduced by one half. Successful CMUT-on-CMOS integration with high-k dielectric is also demonstrated.

Experimental study of dual-ring CMUT array optimization for forward-looking IVUS

Forward-looking (FL) catheters have guiding and volumetric imaging capacities which are highly desirable for IVUS applications. Large channel and firing counts have to be reduced to enable 3-D real-time imaging and simplify front-end electronics. Recently, we have proposed an optimization procedure for dual ring FL arrays which is based on finding an optimal coarray set using the simulated annealing algorithm. The presented algorithm is based on finding a predefined number of optimal firing set which results in elimination of redundant spatial frequencies in the coarray. In this study, we present the experimental demonstration of the proposed method with fabricated single chip CMUT on CMOS system based FL dual ring arrays. The dual ring CMUT arrays were monolithically fabricated on top of CMOS chips which have 25-V pulsers and low-noise transimpedance amplifiers for each transmit and receive array elements. The fabricated CMUT arrays have 56 transmit and 48 receive elements operating at 12 MHz with a 1.4 mm outer diameter. To test the imaging performance of the optimal reduced set, we obtained a 512-element coarray set from the full 2688-element set. In the experiment, we used a phantom of 100-μm aluminium wires immersed in oil tank. We have reconstructed both 2-D PSFs and B-scan images of wire targets. Experimental results demonstrate that the simulated annealing based optimal firing set achieves acceptable lateral and contrast resolution performances with 1/5 of the full set.

Development of free-standing InGaN LED devices on Al2O3/Si substrate by wet etching

Free-standing InGaN-based LEDs grown on Al2O3/Si (1?1?1) have been achieved using selective area wet etching. Conventional device design was used for LED fabrication, in which p-type and n-type contacts are located at the same side of the epilayers. These LED devices were bonded to a dual in-line package (DIP), and epoxy was used to protect the front side of the epilayers as well as the bonding wires. The silicon substrate was selectively removed by wet etching while the chip was mounted in a DIP which prevented the thin film from cracking or warping. No significant change in electrical characteristics, peak emission wavelength or EL intensity versus drive current was observed. The substrate-removal process and the challenges involved are discussed. Such packaging techniques could be beneficial for commercial-scale production of InGaN-based LEDs grown on silicon substrates.