Toshimi Ikeda

Memory device having row decoder

Semiconductor memory device having overdriven bit-line sense amplifiers

Dynamic random access memory having a stacked fin capacitor with reduced fin thickness

Process of producing a semiconductor device in which a height difference between a memory cell area and a peripheral area is eliminated

Semiconductor memory device with reduced its chip area and power consumption

Semiconductor memory device having segment type word line structure

Semiconductor memory device and method for executing shift redundancy operation

Process for producing a semiconductor device

Semiconductor device using two types of power supplies supplying different potentials

Method of liquid treatment of microstructures comprising bendable structural members