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Dive into the research topics where Toshishige Shimamura is active.

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Featured researches published by Toshishige Shimamura.


IEEE Journal of Solid-state Circuits | 2010

Capacitive-Sensing Circuit Technique for Image Quality Improvement on Fingerprint Sensor LSIs

Toshishige Shimamura; Hiroki Morimura; Satoshi Shigematsu; Mamoru Nakanishi; Katsuyuki Machida

This paper describes a new capacitive-sensing circuit technique that improves the quality of images captured with capacitive fingerprint sensor LSIs. The quality of the captured image depends on the surface condition of the finger. When the finger is dry, the electrical resistance of the finger surface is high. The finger surface resistance induces a voltage drop in the electrical potential of the finger surface (which should be grounded), which leads to poor image quality. To capture clear images even when the finger is dry, the circuit technique improves the image quality using the series resistance caused at the finger surface. The potential of the finger surface is controlled by an enhancement plate and a voltage control circuit. A test chip implementing this technique was fabricated on a 0.5 ¿m CMOS process and a sensor process. The chip captures a clear fingerprint image of a dry finger, confirming the effectiveness of the circuit technique for capturing clear fingerprint images independent of the finger surface condition with the capacitive fingerprint sensor LSIs.


international solid-state circuits conference | 2010

Nano-watt power management and vibration sensing on a dust-size batteryless sensor node for ambient intelligence applications

Toshishige Shimamura; Mamoru Ugajin; Kenji Suzuki; Kazuyoshi Ono; Norio Sato; Kei Kuwabara; Hiroki Morimura; Shin'ichiro Mutoh

Nanowatt-power circuit techniques that could overcome the critical bottlenecks preventing the realization of dust-size battery-less sensor nodes are reported. Sensor networks deploying large numbers of nodes are anticipated for “ambient intelligence” [1]. For such networks, the sensor nodes should be miniaturized to the size of dust and be maintenance-free because battery-powered matchbox-sized nodes would be difficult to distribute in large numbers (100 to 1000, for instance) in rooms, and replacing the batteries would be very time-consuming. When the size of a power source is miniaturized to a few mm3, generated power is lowered to the nano-watt-level according to energy density limitations [2]. When the generated power is smaller than the power used for radio, sensor nodes have to accumulate energy [1]. The basic concept of a sensor node with functions for energy accumulation is shown in Fig. 27.10.1. The node contains the function blocks for power generation, power management, sensing, and radio. The power-management block accumulates energy to the accumulation capacitor, which is large enough for radio. When the voltage monitor detects that the voltage of the accumulated energy has reached the voltage needed for radio, the sensing block is activated. Then, the radio block transmits the sensed data when an event occurs. In this mode of operation, the voltage monitor for controlling the switch should operate with sub-nanowatt-level power dissipation because the monitor operates continuously during energy accumulation. Moreover, the power for sensing needs to be reduced to the sub-nanowatt level since the sensing function needs to be active after energy accumulation. On the other hand, the previous works for capacitive-sensing [3–4] and voltage reference [5] consume more than sub-microwatt since they use amplifiers and DC-biased resistors. To solve these problems, we use a voltage-monitoring circuit for power management and a vibration-sensing circuit that can operate even when the power source generates only nanoampere-level currents.


symposium on vlsi circuits | 2001

A pixel-level automatic calibration circuit scheme for sensing initialization of a capacitive fingerprint sensor LSI

Hiroki Morimura; Satoshi Shigematsu; Toshishige Shimamura; K. Machida; I. Kyuragi

We propose a pixel-level automatic calibration circuit scheme that initializes a capacitive fingerprint sensor LSI to eliminate the influence of the surface condition, which is degraded by dirt during practical use. The calibration is executed by adjusting the variable capacitance in each pixel to make the sensed signals of all pixels the same. A fingerprint sensor LSI using the 0.5-/spl mu/m CMOS process/sensor process demonstrates that clear fingerprint images are always obtained by the scheme though the surface condition degrades. The proposed scheme ensures consistent clear image capture during long-term usage.


Japanese Journal of Applied Physics | 2004

Fabrication of Optical Microelectromechanical-System Switches Having Multilevel Mirror-Drive Electrodes

Hiromu Ishii; Masami Urano; Yasuyuki Tanabe; Toshishige Shimamura; Joji Yamaguchi; Toshikazu Kamei; Kazuhisa Kudou; Masaki Yano; Yuji Uenishi; Katsuyuki Machida

This work describes a practical and high-yield method of fabricating optical microelectromechanical-system (MEMS) switches. The method features the use of thick-plated gold multilevel interconnections for the mirror-drive electrodes and polyimide coating to protect the fragile and easily-movable micromachined mirror. The multilevel electrode developed was over 80-µm high providing enough space for the tilting mirror placed above it. Open-short circuit yield was 100% on 6-inch wafers. All the processes for fabricating the electrodes were carried out at under 310°C, meaning the electrodes could be successively formed after mirror-control large-scale integrated circuits (LSIs) were fabricated on a wafer. The fragile mirrors are sealed in polyimide during the fabrication processes. As this method protects the mirrors against the shock and damage caused by factors such as the dicing process, it enables 3-dimensional MEMS structures that have moving portions to be handled through conventional fabrication processes without the need for any special care. The static and dynamic characteristics of the optical MEMS switches fabricated are shown.


international solid-state circuits conference | 2002

A 500 dpi 224/spl times/256-pixel single-chip fingerprint identification LSI with pixel-parallel image enhancement and rotation schemes

Satoshi Shigematsu; K. Fujii; Hiroki Morimura; T. Hatano; Mamoru Nakanishi; T. Adachi; N. Ikeda; Toshishige Shimamura; Katsuyuki Machida; Y. Okazaki; H. Kyuragi

A 500-dpi 224×256-pixel single-chip fingerprint identification LSI adapts the sensing circuit to a finger and performs pixel-parallel image processing and rotation in a pixel array. A test chip achieves 2 ms 10 mW sensing, 41 ms 19.2 mW identification, and practical identification accuracy at 2.5 V, 5 MHz.


international solid-state circuits conference | 2008

A Fingerprint Sensor with Impedance Sensing for Fraud Detection

Toshishige Shimamura; Hiroki Morimura; Nobuhiro Shimoyama; Tomomi Sakata; Satoshi Shigematsu; Katsuyuki Machida; Mamoru Nakanishi

A fingerprint sensor that integrates fraud detection and fingerprint sensing to prevent spoofing with a fake (artificial) finger is presented. Fingerprint identification using capacitive fingerprint sensing provides small user-authentication systems. For systems that need a higher level of security, fraud detection, which determines whether the sensed finger is alive or not, is necessary. Integrating fraud detection capability into a capacitive sensor is important because attempted fraud has to be detected at the same time that the fingerprint is captured. Various methods that use information about a finger, such as its electrical characteristics, optical characteristics or elastic characteristics, have been tried. Impedance-sensing is suitable from the viewpoint of using electrical signals. An impedance-sensing circuit should not increase the chip size nor degrade the quality of the captured fingerprint image. To meet these requirements, we propose an impedance-sensing scheme built into a capacitive sensor and implemented as a circuit and electrode without changing the chip size.


Integrated Ferroelectrics | 1997

Electrical properties of ferroelectric-capacitor-gate si mos transistors using p(l)zt films

Eisuke Tokumitsu; Toshishige Shimamura; Hiroshi Ishiwara

Abstract A ferroelectric-capacitor-gate Si MOSFET which consists of an SiO2/Si MOSFET and a ferroelectric capacitor has been demonstrated. It is shown that memory functions can be obtained by connecting the ferroelectric capacitor with the gate of MOSFETs. The operation of such devices is similar to that of metal-ferroelectric-semiconductor (MFS) FETs. The large memory window or threshold voltage shift can be obtained with a ferroelectric capacitor which has a large coercive voltage. The memory effect of the device has been demonstrated by showing the drain current change by a previously applied “write” pulse at a fixed gate voltage of 0V.


IEEE\/ASME Journal of Microelectromechanical Systems | 2012

Analysis of Electret-Based MEMS Vibrational Energy Harvester With Slit-and-Slider Structure

Norio Sato; Kazuyoshi Ono; Toshishige Shimamura; Kei Kuwabara; Mamoru Ugajin; Yasuhiro Sato

This paper describes an analysis and a performance limit of a vibrational energy harvester with a novel slit-and-slider structure. This structure has a separable electret and microelectromechanical systems (MEMS) parts. In the MEMS parts, movable electrodes slide due to external vibration and receive electrical field that is periodically modulated by slits of fixed electrodes. The structure was fabricated based on MEMS technology and produced an ac current of 170 pA with an external vibration of amplitude of 1 m/s2 at a frequency of 1166 Hz. Since the structure is separable, individual characterization of the electret and movable electrodes was performed. On the basis of their quantitative analyses, a structural model was constructed and validated. The model showed a way to optimize structural and material parameters for enhancement of output power and predicted a performance limit of 2.5 × 10-3 μW and 6.1% as output power and harvester effectiveness, respectively. This value of effectiveness is comparable to that of conventional non-MEMS-based large energy harvester around 1 cm3, which indicates feasibility of MEMS-based small energy harvesters around 0.01 cm3 by appropriate designing.


IEEE Sensors Journal | 2012

Impedance-Sensing Circuit Techniques for Integration of a Fraud Detection Function Into a Capacitive Fingerprint Sensor

Toshishige Shimamura; Hiroki Morimura; Nobuhiro Shimoyama; Tomomi Sakata; Satoshi Shigematsu; Katsuyuki Machida; Mamoru Nakanishi

This paper describes techniques for an impedance-sensing circuit integrated into a capacitive fingerprint sensor to prevent spoofing with a fake finger. We have reported a sensor chip with an embedded impedance-sensing function. We proposed an impedance-sensing circuit that features current-to-voltage con- version using a unity gain buffer. Here, the design of the sensing circuit is discussed. The detectable impedance range and the sensitivity are analyzed within the impedance range for various human fingers. A test chip with the proposed circuit was fabricated using 0.5-μm CMOS/sensor processes. The results confirm that the difference in impedance between a real finger and a fake finger is detected without any degradation of the original characteristics of the fingerprint sensor chip.


IEICE Electronics Express | 2014

Ultra-low-power circuit techniques for mm-size wireless sensor nodes with energy harvesting

Hiroki Morimura; Shoichi Oshima; Kenichi Matsunaga; Toshishige Shimamura; Mitsuru Harada

This paper describes circuit techniques for energy-harvesting technology in millimeter-size ultra-low-power batteryless wireless sensor nodes as a front end for BigData, IoT, M2M, and ambient intelligence. Power generated by energy harvester becomes as small as the nanowatt level when the size of a sensor node becomes millimeter-size. First, technical trends in low-power circuits and the portfolio of energy harvesting and circuit technology are discussed from the viewpoints of technical and application issues. Then, circuit techniques for nanowatt level wireless sensor nodes— a zero-power vibration sensing circuit, power management with MEMS switch, and an intermitted RF transmitter— are explained.

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Katsuyuki Machida

Nippon Telegraph and Telephone

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Hakaru Kyuragi

Nippon Telegraph and Telephone

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Hiromu Ishii

Toyohashi University of Technology

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Tomomi Sakata

Nippon Telegraph and Telephone

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Mamoru Nakanishi

Atomic Energy of Canada Limited

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Mamoru Ugajin

Nippon Telegraph and Telephone

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