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Dive into the research topics where Tse-En Chang is active.

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Featured researches published by Tse-En Chang.


IEEE Transactions on Electron Devices | 1995

Mechanisms of interface trap-induced drain leakage current in off-state n-MOSFET's

Tse-En Chang; Chimoon Huang; Tahui Wang

An interface trap-assisted tunneling and thermionic emission model has been developed to study an increased drain leakage current in off-state n-MOSFETs after hot carrier stress. In the model, a complete band-trap-band leakage path is formed at the Si/SiO/sub 2/ interface by hole emission from interface traps to a valence band and electron emission from interface traps to a conduction band. Both hole and electron emissions are carried out via quantum tunneling or thermal excitation. In this experiment, a 0.5 /spl mu/m n-MOSFET was subjected to a dc voltage stress to generate interface traps. The drain leakage current was characterized to compare with the model. Our study reveals that the interface trap-assisted two-step tunneling, hole tunneling followed by electron tunneling, holds responsibility for the leakage current at a large drain-to-gate bias (V/sub dg/). The lateral field plays a major role in the two-step tunneling process. The additional drain leakage current due to band-trap-band tunneling is adequately described by an analytical expression /spl Delta/I/sub d/=Aexp(B/sub it//F). The value of B/sub it/ about 13 mV/cm was obtained in a stressed MOSFET, which is significantly lower than in the GIDL current attributed to direct band-to-band tunneling. As V/sub dg/ decreases, a thermionic-field emission mechanism, hole thermionic emission and electron tunneling, becomes a primary leakage path. At a sufficiently low V/sub dg/, our model reduces to the Shockley-Read-Hall theory and thermal generation of electron-hole pairs through traps is dominant. >


IEEE Transactions on Electron Devices | 1998

Investigation of oxide charge trapping and detrapping in a MOSFET by using a GIDL current technique

Tahui Wang; Tse-En Chang; Lu-Ping Chiang; Chih-hung Wang; Nian-Kai Zous; Chimoon Huang

We proposed a new measurement technique to investigate oxide charge trapping and detrapping in a hot carrier stressed n-MOSFET by measuring a GIDL current transient. This measurement technique is based on the concept that in a MOSFET the Si surface field and thus GIDL current vary with oxide trapped charge. By monitoring the temporal evolution of GIDL current, the oxide charge trapping/detrapping characteristics can be obtained. An analytical model accounting for the time-dependence of an oxide charge detrapping induced GIDL current transient was derived. A specially designed measurement consisting of oxide trap creation, oxide trap filling with electrons or holes and oxide charge detrapping was performed. Two hot carrier stress methods, channel hot electron injection and band-to-band tunneling induced hot hole injection, were employed in this work. Both electron detrapping and hole detrapping induced GIDL current transients mere observed in the same device. The time-dependence of the transients indicates that oxide charge detrapping is mainly achieved via field enhanced tunneling. In addition, we used this technique to characterize oxide trap growth in the two hot carrier stress conditions. The result reveals that the hot hole stress is about 10/sup 4/ times more efficient in trap generation than the hot electron stress in terms of injected charge.


IEEE Transactions on Electron Devices | 1994

Effects of hot carrier induced interface state generation in submicron LDD MOSFET's

Tahui Wang; Chimoon Huang; P.-C. Chou; Steve S. Chung; Tse-En Chang

A two-dimensional numerical simulation including a new interface state generation model has been developed to study the performance variation of a LDD MOSFET after a dc voltage stress. The spatial distribution of hot carrier induced interface states is calculated with a breaking silicon-hydrogen bond model. Mobility degradation and reduction of conduction charge due to interface traps are considered. A 0.6 /spl mu/m LDD MOSFET was fabricated. The drain current degradation and the substrate current variation after a stress were characterized to compare the simulation. A reduction of the substrate current at V/sub g//spl sime/0.5 V/sub d/ in a stressed device was observed from both the measurement and the simulation. Our study reveals that the reduction is attributed to a distance between a maximum channel electric field and generated interface states. >


international electron devices meeting | 1994

Interface trap induced thermionic and field emission current in off-state MOSFET's

Tahui Wang; Tse-En Chang; Chimoon Huang

An interface trap-assisted tunneling and thermionic emission model has been developed to study an increased drain leakage current in off-state MOSFETs after hot carrier stress. In the model, a complete band-trap-band leakage path is formed at the Si-SiO/sub 2/ interface by hole emission from interface traps to the valence band and electron emission from interface traps to the conduction band. Both hole and electron emissions are carried out via quantum tunneling or thermal excitation. In experiment, a 0.5 /spl mu/m n-MOSFET was subject to hot carrier stress to generate interface traps. The drain leakage current was characterized to compare with the model. Our study reveals that the interface trap-assisted two-step tunneling, hole tunneling followed by electron tunneling, is responsible for the leakage current at a large drain-to-gate bias (V/sub dg/) The lateral field plays a dominant role in the two-step tunneling process. As V/sub dg/ decreases, a thermionic-field emission mechanism, hole thermionic emission and electron tunneling, becomes a primary leakage path. At a sufficiently low V/sub dg/, our model reduces to the Shockley-Read-Hall theory and thermal generation of electron hole pairs through traps is dominant.<<ETX>>


international electron devices meeting | 1997

Characterization of various stress-induced oxide traps in MOSFET's by using a subthreshold transient current technique

Tahui Wang; Lu-Ping Chiang; Nian-Kai Zous; Tse-En Chang; Chimoon Huang

An oxide trap characterization technique by measuring a subthreshold current transient is developed. This technique consists of two alternating phases, an oxide charge detrapping phase and a subthreshold current measurement phase. An analytical model relating a subthreshold current transient to oxide charge tunnel detrapping is derived. By taking advantage of a large difference between interface trap and oxide trap time-constants, this transient technique allows the characterization of oxide traps separately in the presence of interface traps. Oxide traps created by three different stress methods, channel Fowler-Nordheim (F-N) stress, hot electron stress and hot hole stress, are characterized. By varying the gate bias in the detrapping phase and the drain bias in the measurement phase, the field dependence of oxide charge detrapping and the spatial distribution of oxide traps in the channel direction can be obtained. Our results show that 1) the subthreshold current transient follows a power-law time-dependence at a small charge detrapping field, 2) while the hot hole stress generated oxide traps have a largest density, their spatial distribution in the channel is narrowest as compared to the other two stresses, and 3) the hot hole stress created oxide charges exhibit a shortest effective detrapping time-constant.


IEEE Transactions on Electron Devices | 1994

Interface trap effect on gate induced drain leakage current in submicron N-MOSFET's

Tahui Wang; Chimoon Huang; Tse-En Chang; Jih Wen Chou; Chun Yun Chang

An interface trap assisted tunneling mechanism which includes hole tunneling from interface traps to the valence band and electron tunneling from interface traps to the conduction band is presented to model the drain leakage current in a 0.5//spl mu/m LATID N-MOSFET. In experiment, the interface traps were generated by hot carrier stress. The increased drain leakage current due to the band-trap-band tunneling can be adequately described by an analytical expression of /spl Delta/I/sub d/=A exp(-B/sub u//F) with a value of B/sub u/ of 13 MV/cm, which is much lower than that (36 MV/cm) of direct band-to-band tunneling. >


international reliability physics symposium | 1996

Field enhanced oxide charge detrapping in n-MOSFET's

Tahui Wang; Tse-En Chang; Lu-Ping Chiang; Chimoon Huang

The field dependence of oxide charge detrapping time in a 0.6 /spl mu/m DDD n-MOSFET subject to hot carrier stress was characterized. A series of oxide trap charging and discharging conditions were performed using GIDL current as a direct monitor of the transient characteristics of oxide charge detrapping. An analytical model accounting for the GIDL current transient was developed. The measured result shows that the detrapping time is a strong decreasing function of an oxide field, which suggests that the charge detrapping process is mainly via field enhanced tunneling. A quantitative agreement between the measured and the calculated trap time constants was obtained.


symposium on vlsi technology | 1996

Mechanisms and characteristics of oxide charge detrapping in n-MOSFETs

Tahui Wang; Tse-En Chang; Lu-Ping Chiang; Chimoon Huang; J.C. Guo

We have used a GIDL current in an n-MOSFET to monitor oxide charge detrapping directly for the first time. An analytical model accounting for the temporal evolution of the GIDL current was developed. Two oxide trap discharging mechanisms, electron detrapping and hot hole injection, have been separately demonstrated. The field dependence of the detrapping times confirms that the electron detrapping is via field enhanced tunneling. Finally, we have shown the possibility of using this method to probe oxide trap growth characteristics under various hot carrier stress conditions.


international reliability physics symposium | 1997

Investigation of oxide charge trapping and detrapping in a n-MOSFET

Tahui Wang; Tse-En Chang; I.P. Chiang; N.K. Zhous; Chimoon Huang

Oxide hole and electron trapping/detrapping characteristics in a hot carrier stressed n-MOSFET were investigated by monitoring the temporal evolution of band-to-band tunneling current. Both the hole and electron detrapping induced GIDL current transients were observed for the first time in the same device. The obtained field dependence of oxide charge detrapping time indicates that trapezoidal barrier tunneling is a major mechanism in both hole and electron detrapping. A trap assisted sequential tunneling model for hole detrapping was used to match the measured trap time constants.


Applied Physics Letters | 1997

Field and temperature effects on oxide charge detrapping in a metal–oxide–semiconductor field effect transistor by measuring a subthreshold current transient

Lu-Ping Chiang; Nian-Kai Zous; Tahui Wang; Tse-En Chang; K. Y. Shen; Chimoon Huang

A technique to characterize oxide charge detrapping in a Fowler–Nordheim stressed n-metal–oxide–semiconductor field effect transistor is proposed. This technique consists of two alternating phases, an oxide charge detrapping phase and a subthreshold current measurement phase. An analytical model relating a subthreshold current transient to oxide charge density and detrapping time constants was derived. By varying the gate bias in the detrapping phase and the ambient temperature, the field and temperature dependences of oxide charge detrapping can be obtained from the subthreshold current transients measured.

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Tahui Wang

National Chiao Tung University

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Chimoon Huang

National Chiao Tung University

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Lu-Ping Chiang

National Chiao Tung University

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Nian-Kai Zous

National Chiao Tung University

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I.P. Chiang

National Chiao Tung University

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K. Y. Shen

National Chiao Tung University

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P.-C. Chou

National Chiao Tung University

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Steve S. Chung

National Chiao Tung University

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