Tsung-Lin Chou

Analysis of Thermal and Luminous Performance of MR-16 LED Lighting Module

Light emitting diode (LED) with a long lifetime, low power consumption, and low pollution has been successfully applied in many products. However, due to its low electro-optical conversion efficiency, high percentage of input power transformed to redundant heat, thus increasing the LED temperature. This phenomenon decreases the luminous flux, changing light color, and useful life span of LED. Therefore, thermal management becomes an important issue in high power LED. In this paper, the variation of luminous flux and light color for different LED lighting modules under long time operation has been measured and discussed. In addition, a detailed finite element model of LED lighting module, MR-16, with a corresponding input power and suitable boundary conditions is established by using the ANSYS finite element analysis program. Furthermore, to validate the simulation results, the current-voltage-temperature method for characterization of a diode is utilized to measure the junction temperature of LED chip indirectly and compare with simulation results. After the simulation is validated, various thermal performance assessments under the different design parameters of the LED package and lighting module are also investigated in this paper. The methodology and analysis results of this paper can provide a guideline for the LED lighting module such as MR-16 design in the future.

Analysis of Thermal Performance of High Power Light Emitting Diodes Package

This paper reports on the thermal characteristics of the high power LED package. The increment of input power generates more heat in the chip, decreasing the luminance and life span of LEDs. To enhance the efficiency of high power LEDs, challenges related to thermal management need to be addressed. In this research, a detailed finite element model of the high power LED package with proper input power and boundary condition is established using the ANSYS@ finite element analysis program. The applied input power is 1W on GaN, and the convection coefficient is adopted from Williams experimental results. Radiation is also included in the FEM model. Additionally, forward voltage methods used to indirectly measure the junction temperature are also performed to validate the finite element model with predicted input power. The simulation results closely match the experimental data, with only 5% error. Various thermal performances under different design parameters of the high power LED package are developed following verification of the simulation analysis. Five design factors including (a) the substrate of the chip, (b) the thickness of the die attach material (c) the electro-optical conversion efficiency (d) the thickness of the copper slug and (e) the area of the copper slug are chosen to determine themost dominant factor in this study. The factorial design provides a guide line for the compromise between thermal enhanced design and manufacturing process in the future.

Investigation of the thermal performance of high-concentration photovoltaic solar cell package

The demand for energy resources to improve our quality of life continues to increase. However, the prices of Fossil Energy keep going up and the resources are limited. Therefore, more and more reusable energy resources are being developed. The foremost among these reusable energy resources is solar energy. A solar cell, powered by solar energy, uses semiconductors to transform light into electric power. The difference in structure between high- concentration photovoltaic (HCPV) solar cell and traditional solar cell is the usage of concentrated-light module to enhance the optic-electric transition efficiency. In general, under concentrated-light operation condition, the device temperature rises with increasing light concentration ratio. In other words, due to a decrease in open-circuit voltage as a function of increasing temperature, the system output power or energy- conversion efficiency decreases with the increasing temperature of the cell incorporated within the system. Therefore, thermal management has been an important issue for the package of a high-concentration photovoltaic solar cell. In this research, we first established a detailed finite element model of the HCPV solar cell package as a benchmark using ANSYSreg finite element analysis program. The established finite element model can simplify and quickly resolve the thermal management problem of the HCPV solar cell package. We also performed Infrared (IR) thermography measurement experiment in order to validate the finite element model. After validation of the experimental results, we analyzed the variation of thermal performance under different design parameters of the HCPV solar cell package. Based on the simulation results of different design parameters, it can be found that the thickness of the heat sink plate plays important roles in the thermal management of the HCPV solar cell package, which indicates that the thicker the thickness of the aluminum plate, the lower the junction temperature of the HCPV solar cell package. Furthermore, the thermal conductivity of the test board and solder paste has a light effect to reduce junction temperature. The other result shows the capability of a protection gel not only to protect the die surface and wire bond but to also reduce cell temperature under a highly concentrated light condition.

Thermal Performance Assessment and Validation of High-Concentration Photovoltaic Solar Cell Module

A high-concentration photovoltaic (HCPV) system with high optic-electric transition efficiency was developed in order to increase the electrical energy generated by a photovoltaic system. However, device temperature rises quickly because of the solar cell operating under concentrated-light operation conditions. Therefore, system output power or energy-conversion efficiency decreases as the temperature of the cell incorporated within the system increases. Consequently, thermal management has become an important issue for HCPV solar cell package. In this paper, the finite element (FE) analysis was used to initially establish a detailed FE model of the HCPV solar cell package as a baseline model. Moreover, the dissipation power of the solar cell obtained by employing a predicted function is applied. Outdoor experiments were also performed to validate the baseline FE model with the estimated dissipation power. After validation of the simulation, an analysis of the thermal performance variations under different HCPV solar cell package design parameters was performed. Simulation results of different design parameters revealed that the geometry of the heat sink plate played an important role in the thermal management of the HCPV solar cell package.

Fabrication process simulation and reliability improvement of high-brightness LEDs

Abstract To enhance the light extraction efficiency and thermal performance of AlGaInP light-emitting diodes (LEDs), the wafer bonding technique which can replace the GaAs substrate with other high thermal conductivity substrates was applied. However, this technique may make the film crack during either the removal etching process of the GaAs substrate or the annealing process after the GaAs removal. Therefore, this crack problem is an important issue in the reliability/yield of high-brightness LEDs. In this research, a detailed finite element model of the high-brightness AlGaInP LED, which is replaced by the GaAs substrate with high thermal conductivity substrate through the Au–In metal bonding technique, was developed and fabricated. In addition, the mechanical behavior of wafer-level metal bonding was also simulated by finite element analysis (FEA) and validated by experimental measurements. Hence, the above validated simulation technique combined with process modeling is used to understand the stress variation of the multilayer structure of AlGaInP LED during the fabrication process and to find the principal cause of the film crack.

Investigation of the hysteresis phenomenon of a silicon-based piezoresistive pressure sensor

At present, the silicon piezoresistive pressure sensor is a mature technology in the industry, and its measurement accuracy is more rigorous in many advanced applications. Micro piezoresistive pressure sensor is fabricated by a MEMS process, and its main operational principle is that the external pressure loading causes the deflection, strain, and stress which occur on the silicon membrane. The environmental temperature, the humidity, and the pressure will reduce its performance. Moreover, the drifts of output voltage in the same temperature caused by the residual stress on the aluminum trace under thermal cycle loading also influence the performance of the piezoresistive pressure sensor. This is called the thermal hysteresis phenomenon, and the variation of output voltage is called the thermal hysteresis voltage. Among the critical issues of silicon piezoresistive pressure sensor, the hysteresis phenomenon should be deeply paid attention to obtain better sensor accuracy. For this reason, this research would like to investigate the effect of the external loading on the output voltage of a pressure sensor. Based on the process of pressure sensors, this research adopts the concept of pseudo temperature combined with a finite element method (FEM) to obtain the thermal hysteresis voltage. After several numerical analysis of thermal hysteresis voltage, the experiment is then performed to validate the simulation results. After being validated with the experimental results, the variation of thermal hysteresis voltage under a different trace layout is analyzed. Based on simulation results of a different trace layout, it is found that the trace line layout plays an important role in the thermal hysteresis performance of a pressure sensor, which indicates that the longer aluminum trace increases the hysteresis voltage. The uniform and symmetrical layout of aluminum trace can reduce the variation of resistance change and decrease the hysteresis voltage. Furthermore, the trace layout which is far away from the silicon membrane and piezoresistance is suggested to reduce the hysteresis voltage.

Determination of maximum strength and optimization of LED chip structure

High-power light emitting diodes (LEDs) are found in a number of applications in high-volume consumer markets, such as illumination, signalling, screen backlights, automotives, and others, because of the numerous advantages of LEDs, including low power cost, long life span, and high efficiency. During the manufacturing process, the high-power LED chips are subjected to mechanical and thermal loadings. Wire bonding is one of the major processes in the LED packaging process that provide electrical interconnection between the bonding pad and the lead. However, due to bad parameter setup in a wire bonder, the LED will crack and the pad will peel after wire bonding. In this study, the strength of LED is determined for the design requirement in order to ensure good reliability of wire bonding. Pointload test (PLT) and focused ion beam (FIB) are used to determine the maximum allowable force the epilayer can withstand, which is approximately 75 g. By combining the finite element method and experimental data, a useful design tool to confirm LED die strength is provided. Finite element results of contact analysis show that the stress concentration area is located on the edge of the pin and maximum stress (227 MPa) occurs in the epilayer. Parametric study is employed to find ways to reduce stress in LED layer. The results indicate that increasing pad thickness is the major factor that can reduce stress and enhance LED die strength. PLT and FIB experiments are also performed to confirm simulation results.

Transient thermal analysis of high-concentration photovoltaic cell module subjected to coupled thermal and power cycling test conditions

Based on the standard of International Electrotechnical Commission (IEC) on the thermal cycling test for a high concentration photovoltaic (HCPV) module, frequent current input must be applied when oven temperature exceeds 25°C. As such, the junction temperature of a solar cell chip would oscillate due to the joule heating effect. However, the fluctuation of the junction temperature might be one of the reliability issues being faced by an HCPV thermal cycling test. The process of getting the actual junction temperature is necessary before its mechanical behavior is discussed. In this study, the forward voltage method was adopted to measure and monitor the time-dependent junction temperature of an HCPV module. In addition, a detailed finite element (FE) model of the HCPV module with adapted input power and suitable boundary condition was established, analyzed, and validated with the experimental data. Results on the finite element analysis (FEA) were consistent with the experimental data. Hence, we conclude that the simulation of the FE model adopted in this research can be effectively used to simulate the transient thermal characteristics of an HCPV module, subjected to coupled power and thermal cycling test conditions.

Sapphire-removed induced the deformation of high power InGaN light emitting diodes

Thick copper films on vertically structures InGaN LEDs play a critical role after sapphire removed. The most commonly used GaN thin film growth technique is metal-organic chemical vapor deposition (MOCVD), which provides a high growth temperature, as a result, high intrinsic stress takes place between sapphire and InGaN surface. If the aforementioned metal supporter experiences a large warpage induced from intrinsic stress after sapphire removed, the subsequent processes would be very difficult to carried out. To solve the above issue, a finite element (FE) numerical simulation was employed for stress-strain behavior analysis of the LED device, the results reveal that, increasing the thickness of metal layer or implementing a pre-metal deposition buffer layer can apparently reduce the device warpage after sapphire removal. Based on the above design concepts, the experimental result depicts that, the warpage of LED wafer can be effectively reduced by 25% when metal layer increased from 62.5 um to 82.5 um, which shows good agreements with FE result, hence validates the established research methodology. And more importantly, based on the process modelling and sapphire-removal simulation-technique developed in this study, an optimal novel LED structure is designed for the reduction of process induced warpage. To conclude, a LED chip structural design-process modeling-fabrication methodology was successfully developed, and can be further contributed to the LED industry.

Strength determination of light-emitting diodes and chip structure design

Light-emitting diodes (LEDs), representing a type of solid-state lighting, have been widely used as indicator lamps in the past few decades. It has attracted a great deal of attention in various illuminating applications in recent years due to its outstanding advantages, such as low power cost, long life time, and high efficiency. However, to make it possible to apply LED in daily life, a suitable package structure is necessary, which provides electrical interconnection and protection functions. Recently, the technology for a high power LED packaging that employs applied wire bonding process to achieve electrical interconnection has been widely adopted by LED packaging house. However, improper wire bonding parameters often result in LED die cracking or pad peeling. In this study, the strength of LED dies was investigated in order to improve the yielding of wire bonding. To determine its strength, point-load test associated with focusedion beam was utilized to measure the ultimate reactive force. Results of the experiment were further integrated with simulation technology based on the finite element method to evaluate its ultimate strength. In the PLT tests, direct contact pin-loading was applied to the epilayer surface of the LED dies and the ultimate force was measured. After the PLT tests, FIB was utilized to investigate fracture initiating location in the epilayer. The PLT results showed that the averaged ultimate force is about 75 g. According to the FIB results, the vertical load was validated as the driving force for pad peeling, epilayer crack, and LED die crack. Based on the experimental data, an FEM 3D contact model was utilized to analyze its detailed mechanical behaviours. Simulation results showed that stress concentration occurred near the edge of the pin and that the maximum stress took place in epilayer. In order to reduce the stress, three kinds of new LED structures that introduce the stress buffer layer between the Au pad and LED layers were evaluated, and the results showed good improvement of stress reduction in the epilayer. Nevertheless, the soft material applied for the stress buffer structure may cause another failure issue under thermal loading during the bonding process due to the mismatch of the coefficient of thermal expansion. Therefore, to achieve the optimal design and the best combination of design parameters, the simulation-based design methodology must be adopted to meet the design and production optimization goals, which would be impossible if done by conventional experiment-based trial-and-error design procedure.