Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Tuhina Samanta is active.

Publication


Featured researches published by Tuhina Samanta.


Computers & Electrical Engineering | 2014

Effective fault detection and routing scheme for wireless sensor networks

Indrajit Banerjee; Prasenjit Chanak; Hafizur Rahaman; Tuhina Samanta

Display Omitted An energy efficient fault detection and data routing scheme (EFDR) is proposed for sensor nodes hardware.Cellular automata (CA) rules have been employed for sensor node and network management.The proposed scheme reuses the faulty sensor nodes in order to improve the network performances.The proposed method uses vector based fault detection model for sensor circuit fault identification.The performance of the EFDR is better in terms of network coverage, network life time and energy consumption. In a wireless sensor network (WSN), random occurrences of faulty nodes degrade the quality of service of the network. In this paper, we propose an efficient fault detection and routing (EFDR) scheme to manage a large size WSN. The faulty nodes are detected by neighbour nodes temporal and spatial correlation of sensing information and heart beat message passed by the cluster head. In EFDR scheme, three linear cellular automata (CA) are used to manage transmitter circuit/ battery condition/microcontroller fault, receiver circuit fault and sensor circuit fault representation. On the other hand, L-system rules based data routing scheme is proposed to determine optimal routing path between cluster head and base station. The proposed EFDR technique is capable of detecting and managing the faulty nodes in an efficient manner. The simulation results show 86% improvement in the rate of energy loss compared to an existing algorithm.


international symposium on circuits and systems | 2006

A heuristic method for constructing hexagonal Steiner minimal trees for routing in VLSI

Tuhina Samanta; Prasun Ghosal; Hafizur Rahaman; Parthasarathi Dasgupta

In deep sub-micron regime, interconnect delays dominate VLSI circuit design. Thus, construction of cost-effective global routing trees is key to such designs. In order to reduce the interconnect delay, traditional Manhattan (M-) routing architectures are currently being replaced by the diagonal X architectures. A recent routing architecture is based on Y interconnects, involving the pervasive use of 0deg, 60deg, and 120deg oriented global and semi-global wirings. Unlike the X-routing, Y-routing Is observed to support regular routing grid, which as important for simplifying manufacturing processes and routing and design rule checking algorithms. In this paper, we propose a novel Y-routing algorithm which can solve reasonably sized problems in nominal time. The proposed method is capable of finding routing solutions for problem instances which could not be solved in reasonable time by some recently reported methods. Moreover, it can be easily extended for routing with any uniform orientation


international conference on communications | 2012

Shortest path based geographical routing algorithm in wireless sensor network

Indrajit Banerjee; Indrani Roy; Ahana Roy Choudhury; Biswarup Das Sharma; Tuhina Samanta

We propose a novel heuristic algorithm that performs geographical routing based on a greedy approach. Our proposed scheme first allocates the geographic locations of the source and the destination nodes influenced by their GPS information. A virtual Euclidean path is considered as a reference line to choose appropriate node for routing. Then, a multi-hop technique is adopted to establish routing path between them. The nodes in the routing paths are chosen in a greedy manner, having minimum distance from the Euclidean line and having minimum overlap in coverage area with its immediate predecessor node. The elegance in our proposed method is that it is capable of routing data successfully from the source to the destination, with nominal number of hops, and hence improves power handling capability of the network. Performance analysis of our algorithm is done in terms of routing overhead, and average end-to-end delay measure.


international conference on vlsi design | 2012

A Heuristic Method for Co-optimization of Pin Assignment and Droplet Routing in Digital Microfluidic Biochip

Ritwik Mukherjee; Hafizur Rahaman; Indrajit Banerjee; Tuhina Samanta; Parthasarathi Dasgupta

Design automation in Digital micro fluidic biochip is of immense importance in to days clinical diagnosis process. In this paper, we try to build a heuristic algorithm to simultaneously perform droplet routing and electrode actuation. The proposed method is capable of performing (i) droplet routing with minimal electrode usages in optimized routing completion time, and (ii) minimal number of control pin assignment on the routing path for successful droplet transportation. The proposed method is a co-optimization technique that finds the possible shortest path between the source and the target pair for a droplet and assigns control pins in an optimal manner to actuate the routing path. Intersection regions for multiple droplets are also assigned with pins in an efficient manner to avoid unnecessary mixing between several droplets. The proposed method is tested on various benchmarks and random test sets, and experimental results are quite encouraging.


ieee computer society annual symposium on vlsi | 2008

Thermal-Aware Placement of Standard Cells and Gate Arrays: Studies and Observations

Prasun Ghosal; Tuhina Samanta; Hafizur Rahaman; Parthasarathi Dasgupta

In high-performance VLSI circuits, the on-chip power densities are playing dominant role due to increased scaling of technology, increasing number of components, frequency and bandwidth. The consumed power is usually converted into dissipated heat, affecting the performance and reliability of a chip. In this paper, we consider the placement of standard cells and gate arrays (modules) under thermal considerations. Our contributions include: (i) an algorithm for optimal placement of the gates or cells to minimize the possible occurrence of hot spots, (ii) results of sensitivity analysis of thermal characteristic of a layout with respect to the power densities of the modules in the layout, and identifying three classes of modules, and (iii) an algorithm for optimal placement of modules, with minimum possible occurrence of hot spots, and reasonable estimated interconnect lengths. Experimental results on randomly generated and standard benchmark instances are quite encouraging.


ieee asme international conference on mechatronic and embedded systems and applications | 2010

Method of droplet routing in digital microfluidic biochip

Kamalesh Singha; Tuhina Samanta; Hafizur Rahaman; Parthasarathi Dasguptay

One of the challenging research areas nowadays is the design and use of microfluidic biochips, the digital microfluidic biochips (DMFB). It is used for analysis of different biological samples like protein, sirum etc using an array of electrically controlled electrodes. This paper deals with a challenging problem related to the design of DMFB. Specifically the design problem considered is related to high-performance droplet routing, where each droplet has single source location and single target location. The objectives are (i) minimizing the number of electrodes used in the DMFB, and (ii) minimizing total routing time/latest arrival time of all the droplet at their target locations. We propose a simple algorithm for concurrent path allocation to multiple droplets, based on the classical shortest-path algorithm, together with the use of stalling, and possible detouring of droplets in cases of contentions. The algorithm is also extended to droplet routing where a droplet may have two source positions and a single target position. The algorithm is implemented on a Linux platform and empirical results are quite encouraging.


international symposium on electronic system design | 2011

Ant Colony Optimization Based Droplet Routing Technique in Digital Microfluidic Biochip

Indrajit Pan; Parthasarathi Dasgupta; Hafizur Rahaman; Tuhina Samanta

Digital micro fluidic biochip


system-level interconnect prediction | 2008

Revisiting fidelity: a case of elmore-based Y-routing trees

Tuhina Samanta; Prasun Ghosal; Hafizur Rahaman; Parthasarathi Dasgupta

(DMFB)


2014 Applications and Innovations in Mobile Computing (AIMoC) | 2014

Energy efficient coverage of static sensor nodes deciding on mobile sink movements using game theory

Nimisha Ghosh; Indrajit Banerjee; Tuhina Samanta

has gained much importance in recent times, which supports various on chip biological sample analysis. The analysis is performed on a two dimensional micro array. Significant researches are going on for high performance droplet routing in DMFB using computer aided design (


ieee sensors | 2013

Cluster head load distribution scheme for wireless sensor networks

Prasenjit Chanak; Tuhina Samanta; Indrajit Banerjee

CAD

Collaboration


Dive into the Tuhina Samanta's collaboration.

Top Co-Authors

Avatar

Indrajit Banerjee

Indian Institute of Engineering Science and Technology

View shared research outputs
Top Co-Authors

Avatar

Hafizur Rahaman

Indian Institute of Engineering Science and Technology

View shared research outputs
Top Co-Authors

Avatar

Parthasarathi Dasgupta

Indian Institute of Management Calcutta

View shared research outputs
Top Co-Authors

Avatar

Indrajit Pan

RCC Institute of Information Technology

View shared research outputs
Top Co-Authors

Avatar

Prasenjit Chanak

Indian Institute of Engineering Science and Technology

View shared research outputs
Top Co-Authors

Avatar

Prasun Ghosal

Indian Institute of Engineering Science and Technology

View shared research outputs
Top Co-Authors

Avatar

Mainak Chatterjee

University of Central Florida

View shared research outputs
Top Co-Authors

Avatar

Partha Pratim Saha

MCKV Institute of Engineering

View shared research outputs
Top Co-Authors

Avatar

Mrinmoy Sen

Indian Institute of Engineering Science and Technology

View shared research outputs
Researchain Logo
Decentralizing Knowledge