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Dive into the research topics where Tzu-Chao Yan is active.

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Featured researches published by Tzu-Chao Yan.


IEEE Microwave and Wireless Components Letters | 2010

A 60 GHz Injection-Locked Frequency Tripler With Spur Suppression

Chien-Nan Kuo; Tzu-Chao Yan

A 60 GHz injection-locked frequency tripler is designed to improve spectral purity with spur suppression of the fundamental and the even-order harmonics. Several circuit designs are utilized in the harmonic current injection circuit to maximize the third-order harmonic and minimize the undesired harmonic current outputs, including notch filters and a capacitive cross-coupled transistor pair. With the input signal of 0.5 dBm at 19.7 GHz, the harmonic rejection ratios of the fundamental, and the second-order achieve 31.3 dBc, and 45.8 dBc, respectively. Implemented in 0.13 m CMOS technology, the core circuit consumes power of 9.96 mW with 1.2 V supply voltage. The entire die occupies an area of 985 × 866 μm2.


topical meeting on silicon monolithic integrated circuits in rf systems | 2009

A CMOS Up-Conversion Mixer with Wide IF Bandwidth for 60-GHz Applications

Min-Chiao Chen; Huan-Sheng Chen; Tzu-Chao Yan; Chien-Nan Kuo

In this paper, a direct up-conversion mixer with wide intermediate frequency (IF) bandwidth is designed and fabricated for 60-GHz applications. The up-converted differential signal is transformed to single-ended signal through an on-chip balun. In addition, an injection-locked frequency tripler is integrated for local oscillator signal generation. The measured results shows the maximum conversion gain of -5.6 dB, the input-referred 1-dB compression point (IP1dB) of -14 dBm, the third-order intercept point (IIP3) of -4 dBm, and 3-dB IF bandwidth of 3.5 GHz. The proposed up-conversion mixer is fabricated using 0.13-μm standard CMOS technology, and it draws only 2.25 mA from 1.2-V supply.


IEEE Microwave and Wireless Components Letters | 2009

A K-Band CMOS Quadrature Frequency Tripler Using Sub-Harmonic Mixer

Chien-Nan Kuo; Huan-Sheng Chen; Tzu-Chao Yan

A low-power frequency tripler is designed by using the sub-harmonic mixer configuration for K-band applications. The proposed circuit features quadrature signal generation, applicable to LO signal synthesis in millimeter-wave wireless transceivers. It achieves conversion gain of -5.7 dB at the output frequency of 21 GHz. Implemented in a 0.18 mum CMOS technology, the circuit consumes power of 7.5 mW with 1.5 V supply voltage. The entire die occupies an area of 1000times1050 mum2.


international soc design conference | 2011

Design of millimeter-wave CMOS frequency tripler

Tzu-Chao Yan; Chien-Nan Kuo

The design of millimeter-wave frequency triplers using sub-harmonic mixing and injection-locking is discussed. The design goals are aimed at low power consumption, high harmonic rejection, and bandwidth extension. Several circuit design techniques will be reviewed for consideration of these goals. These frequency triplers are all designed and implemented in CMOS technology.


asian solid state circuits conference | 2014

CMOS THz transmissive imaging system

Tzu-Chao Yan; Chun-Hsing Li; Chih-Wei Lai; Wei-Cheng Chen; Tzu-Yuan Chao; Chien-Nan Kuo

This paper presents a THz imaging system composed of a signal source and a signal sensor in CMOS technology. The signal source integrates a 338 GHz oscillator in 40-nm CMOS and an antenna array on a Benzocyclobutene (BCB) carrier using the SoP (System-on-Package) technique. The measured EIRP achieves +8 dBm. The signal sensor is implemented in 0.18 μm CMOS. The measured maximum responsivity is 632 kV/W at 332 GHz. The signal source and signal sensor consume dc power of 37.5 mW and 7.92 mW, respectively. The resolution of the proposed THz imaging system is 4 mm.


international midwest symposium on circuits and systems | 2012

An ultra-low power interface CMOS IC design for biosensor applications

Weibo Hu; Yen-Ting Liu; Vighnesh Das; Cliff Schecht; Tam Q. Nguyen; Donald Y. C. Lie; Tzu-Chao Yan; Chien-Nan Kuo; Stanley Wu; Yuan-Hua Chu; Tzu-Yi Yang

This paper presents a design example of an ultra-low power single-channel analog front-end (AFE) integrated circuits (IC) and system for biomedical sensing applications. The 0.18-μm CMOS AFE IC design includes a low noise instrumentation amplifier (INA), a low-pass filter (LPF), a variable gain amplifier (VGA), and a successive approximation register (SAR) analog-to-digital converter (ADC). The AFE IC architecture is analyzed on the system level to minimize total power consumption with high integration and optimized for an ECG sensing system. SPICE simulations of the AFE IC channel validate the ultra-low power IC design methodology for heartbeat detection with less than 1 μA/channel.


international symposium on radio-frequency integration technology | 2011

A 3.5 GHz phase shifter of high input power range with digitally controlled VGA

Tzu-Chao Yan; Wei-Zhen Lin; Chien-Nan Kuo

A high input power range phase shifter is designed and fabricated on 0.18-μm CMOS technology. With proposed variable gain amplifier in I/Q vector combination based phase shifter, the performance of output signal has been improved. From measured results, the gain variation and phase distortion versus input power of output signal are smaller than 1.5 dB and ±2 °, respectively. The minimum DC consumption of core circuit is 15.46 mW from 1.8 V supply voltage.


international symposium on radio-frequency integration technology | 2016

A 1–5 GHz frequency-to-voltage converter using limiting amplifier

Han-Bo Lin; Tzu-Chao Yan; Chien-Nan Kuo

A frequency-to-voltage converter (FVC) is designed for directly converting an input radio-frequency to a dc output voltage over a wide microwave frequency range. The proposed circuit consists of a limiting amplifier (LA) for converting input frequency to correspond ac magnitude and a power detector for ac magnitude to dc voltage conversion. Consequently, the circuit converts the signal frequency of 1-5 GHz to the measured dc voltage of 0.25-1.39 V under the input power level at +5 dBm. The RMS error is below 1.37 %. Implemented in 0.18 μm CMOS technology, the dc power consumption varies from 17.4 to 19.4 mW with 1.8 V supply voltage, depending on the input frequency. The fabricated chip occupies the size of 860 × 500 μm2.


topical meeting on silicon monolithic integrated circuits in rf systems | 2015

Electronic THz transmissive imaging system

Wei-Cheng Chen; Chih-Wei Lai; Tzu-Chao Yan; Chun-Hsing Li; Tzu-Yuan Chao; Chien-Nan Kuo

An electronic THz transmissive imaging system is presented in this work. This system is composed of a CMOS signal source, a CMOS signal sensor, lenses, and commercial electronic chopping components. The output frequency of the signal source is 339 GHz, and the responsivity of the signal sensor is 200 kV/W. The total dc power consumption of those CMOS circuits is 91.02 mW. Using electronic chopping at the frequency up to 100 kHz helps improve the system dynamic range and makes imaging feasible. The resolution of the realized imaging system achieves 2 mm.


international soc design conference | 2015

Low-cost high-performance CMOS terahertz imaging system

Chung Hsing Li; Tzu-Chao Yan; Yuhsin Chang; Chyong Chen; Chien-Nan Kuo

CMOS technology has found its way in THz imaging applications. Utilizing the plasma wave theory, a MOSFET device can detect THz radiation beyond the cutoff frequency. Assisted by the system-on-packaging technique, a CMOS source delivers radiation power more effectively. An imaging system demonstrates that a low-cost CMOS solution is feasible.

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Chien-Nan Kuo

National Chiao Tung University

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Chih-Wei Lai

National Chiao Tung University

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Chun-Hsing Li

National Central University

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Wei-Cheng Chen

National Chiao Tung University

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Wei-Zhen Lin

National Chiao Tung University

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Huan-Sheng Chen

National Chiao Tung University

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Tzu-Yi Yang

Industrial Technology Research Institute

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Tzu-Yuan Chao

National Chiao Tung University

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Chung Hsing Li

National Central University

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Chyong Chen

National Chiao Tung University

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