Uei-Ming Jow
Industrial Technology Research Institute
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Featured researches published by Uei-Ming Jow.
Proceedings of the 4th International Symposium on Electronic Materials and Packaging, 2002. | 2002
Chang-Sheng Chen; Shur-Fen Liu; Chun-Kun Wu; Pel-Shen Wei; Ching-Lian Weng; Uei-Ming Jow; Ying-Jiunn Lai
In addition to the technology of system on a chip (SOC), the board level, system in a package (SIP) technology, will be another trend concordant with SOC technology to meet the requirements of future high frequency products. Therefore, the Embedded Passives technology becomes an important subject for both SOC and SIP technology to implement and extend their application field. For SIP technology, the integral substrate technology is a solution to realize embedded passives. The integral substrate technology is a noble design and manufacturing methodology which uses special materials to achieve specific circuit functions, and combines fine processes such as high density interconnection (HDI) technology. In this paper, a newly achieved high dielectric constant (Hi-DK) material, which is suitable for the Multi-Layer Printed Wiring Board (PWB) lamination process, is used to implement embedded capacitors. The electrical parameters such as dielectric constant and loss tangent versus frequency of the Hi-DK material were extracted from circuit characteristics. Many different types and sizes of embedded capacitors were designed and had been fitted by some circuit equivalent models; then we constructed a library of these elements. Furthermore, we verified these embedded capacitors by a 2.4 GHz power amplifier on a 6-layer, built-up process PWB, for wireless LAN application. The performance of the power amplifier designed by embedded capacitors was as good as the one designed by surface mount capacitors.
ASME 2004 International Mechanical Engineering Congress and Exposition | 2004
Chao-Liang Chang; Uei-Ming Jow; Chao-Ta Huang; Hsiang-Chi Liu; Jr-Yuan Jeng; Yung-Yu Hsu; Chih-Min Yao; Ming-Hsiao Lee; Kung-Yu Tzeng; Yu-Ching Shih
The micro-inductor is a key component in wireless power transmission micro modules. In this paper, an optimum design for the micro-inductor was studied and related MEMS fabrication techniques were also developed. Commercial electromagnetic property analysis software, ANSOFT, was used to screen the main design factors of the micro-inductor. It was found that the high inductance and high quality factors of the micro-inductor implied high power transmission efficiency for the micro-module’s wireless power transmission. The electrical performance of the micro-inductor was affected by the thermal stress and thermal strain induced in the operational environment of the wireless power transmission micro-module. In order to investigate the reliability of the micro-inductor, commercial stress analysis software, ANSYS, was used to calculate thermal stress and thermal strain. The deformed model of the micro-inductor was then imported into ANSOFT in order to calculate its electrical properties. Glass substrate Pyrex 7740 was used to reduce the substrate loss of the magnetic flux of the micro-inductor. The surface micromachining technique, a kind of MEMS processing, was chosen to fabricate the micro-inductor; the coil of the micro-inductor was electroplated with copper to reduce the series resistance. The minimum line width and line space of the coil were 20 μm and 20 μm respectively. Polyimide (PI) was used for supporting the structure of micro-inductors. The maximum shear stress was 74.09MPa and the maximum warpage was 2.197 μm at a thermal loading of 125°C. For the simulated data, the most suitable areas for 31-turn and 48-turn coils were at an area ratio of 1.27 and 2, respectively. The electrical properties of the inductors changed slightly under thermal loading.Copyright
electronics packaging technology conference | 2003
Pei-Shen Wei; Ching-Lian Weng; Chang-Sheng Chen; Chun-Kun Wu; Uei-Ming Jow; Ying-Jiunn Lai
The motivation to further miniaturize and reduce the cost of portable electric devices has recently focused on the task of integration of the passive functions. In this paper, implications for integrating inductors and capacitors with standard multi-layer printed wiring board (PWB) lamination processes on organic substrates is discussed. To improve the circuit performance and obtain greater benefits of the integral passives, a multi-dielectric substrate with layer-specific dielectric constant and thickness is used to fulfill the designing of various integral passives. With these different material characteristics, we extract electrical parameters such as dielectric constant and loss tangent versus frequency of the special materials and then design various integral passives in a 6-layer multi-dielectric PWB substrate. Finally the potential advantages of using the PWB process on organic substrate with integral passives for a Bluetooth (BT) module are demonstrated.
Archive | 2009
Uei-Ming Jow; Chang-Sheng Chen; Chin-Sun Shyu
Archive | 2010
Uei-Ming Jow; Ching-Liang Weng; Ying-Jiunn Lai; Chang-Sheng Chen
Archive | 2005
Uei-Ming Jow; Min-Lin Lee; Shinn-Juh Lay; Chin-Sun Shyu; Chang-Sheng Chen
Archive | 2006
Ching-Liang Weng; Chang-Sheng Chen; Ying-Jiunn Lai; Uei-Ming Jow; Chin-Sun Shyu
Archive | 2008
Uei-Ming Jow; Chang-Sheng Chen; Chin-Sun Shyu; Min-Lin Lee; Shinn-Juh Lay; Ying-Jiunn Lai
Archive | 2010
Uei-Ming Jow; Chin-Sun Shyu; Chang-Sheng Chen; Min-Lin Lee; Shinn-Juh Lai
Archive | 2007
Uei-Ming Jow; Min-Lin Lee; Shinn-Juh Lay; Chin-Sun Shyu; Chang-Sheng Chen