Uwe Wahl

Analysis of the role of the parasitic BJT of Super-Junction power MOSFET under TLP stress

Abstract The Super-Junction power Metal-Oxide-Semiconductor Field-Effect-Transistor (SJ-MOSFET) is one of the main switches in solar, lighting, consumer, server, and telecom applications. Among other market requirements a long lifetime is crucial, thus device robustness and reliability are decisive in quality assessment. Several failures are attributed to the action of the parasitic Bipolar Junction Transistor (BJT) inherent to the physical structure of the SJ-MOSFET. Our purpose is to gain insight into the role of the parasitic BJT under fast voltage pulse condition and to determine if the Transmission Line Pulse (TLP) can be used as a new method for predicting the Single Event Burnout (SEB) sensitivity of SJ-MOSFETs. SEB is caused by extreme localized triggering of the parasitic BJT while the whole device is in the off-state. However, TLP is uniform across a device and drives it into the avalanche multiplication regime. We demonstrate by direct comparison to equivalent SJ-Diodes that the parasitic BJT stabilizes the SJ-MOSFET when subjected to high voltage pulses generated by a TLP system. We conclude that the fast voltage method is not suited for emulating cosmic ray induced failure, but shows immense potential in analyzing device failure in other regimes.

Short-circuit safe operating area of superjunction MOSFETs

Superjunction (SJ) Si-MOSFET power transistors have a larger active volume and thus a higher heat capacitance than wide-bandgap semiconductors with the same voltage and current rating. This could allow for higher power dissipation levels and thus increased short-circuit robustness. Therefore, this paper investigates the safe operating area (SOA) of a state-of-the-art SJ-MOSFET in short-circuit operation with high drain-source voltages by both measurements and simulations. The observed behavior will be discussed and explained using a simple physics-based simulation model, taking both the electrical and the thermal behavior of the device into account. The obtained results are useful to assess the applicability of SJ-MOSFETs for emerging application. Moreover, they can also serve as a valuable starting point for further device improvements.

A low-impedance TLP measurement system for power semiconductor characterization up to 700V and 400A in the microsecond range

A TLP system with a very low characteristic impedance of 1.5Ω and a selectable pulse length from 0.5 to 6 μs is presented. It covers the entire operation region of many power semiconductors up to 700V and 400 A. Its applicability is demonstrated by determining the output characteristics for two CoolMOS devices up to destruction.