Van N. Truskett

Development of imprint materials for the Step and Flash Imprint Lithography process

The Step and Flash Imprint Lithography (S-FILTM) process is a step and repeat nano-replication technique based on UV curable low viscosity liquids. Molecular Imprints, Inc. (MII) develops commercial tools that practice the S-FIL process. This talk will present the imprint materials that have been developed to specifically address the issue of process life and defects. The S-FIL process involves field-to-field dispensing of low viscosity (<5 cps) UV cross-linkable monomer mixtures. The low viscosity liquid leads to important advantages that include: • Insensitivity to pattern density variations • Improved template life due to a lubricated template-wafer interface avoids “hard contact” between template and wafer • Possibility for lubricated (in-situ) high-resolution alignment corrections prior to UV exposure The materials that are optimal for use in the S-FIL process need to possess optimal wetting characteristics, low evaporation, no phase separation, excellent polymer mechanical properties to avoid cohesive failure in the cured material, low adhesion to the template, and high adhesion to the underlying substrate. Over 300 formulations of acrylate based monomer mixtures were developed and studied. The imprint materials were deemed satisfactory based on the process of surviving imprinting more than 1500 imprints without the imprints developing systematic or repeating defects. For the purpose of these process studies, printing of sub-100 nm pillars and contacts is used since they represent the two extreme cases of patterning challenge: pillars are most likely to lead to cohesive failure in the material; and contacts are most likely to lead to mechanical failure of the template structures.

Advances in Nanoimprint Lithography

Nanoimprint lithography (NIL), a molding process, can replicate features <10 nm over large areas with long-range order. We describe the early development and fundamental principles underlying the two most commonly used types of NIL, thermal and UV, and contrast them with conventional photolithography methods used in the semiconductor industry. We then describe current advances toward full commercial industrialization of UV-curable NIL (UV-NIL) technology for integrated circuit production. We conclude with brief overviews of some emerging areas of research, from photonics to biotechnology, in which the ability of NIL to fabricate structures of arbitrary geometry is providing new paths for development. As with previous innovations, the increasing availability of tools and techniques from the semiconductor industry is poised to provide a path to bring these innovations from the lab to everyday life.

Defect reduction for semiconductor memory applications using jet and flash imprint lithography

Imprint lithography has been shown to be an effective technique for replication of nano-scale features. Jet and Flash Imprint Lithography (J-FIL) involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed leaving a patterned resist on the substrate. Acceptance of imprint lithography for manufacturing will require demonstration that it can attain defect levels commensurate with the defect specifications of high end memory devices. Typical defectivity targets are on the order of 0.10/cm2. In previous studies, we have focused on defects such as random non-fill defects occurring during the resist filling process and repeater defects caused by interactions with particles on the substrate. In this work, we attempted to identify the critical imprint defect types using a mask with NAND Flash-like patterns at dimensions as small as 26nm. The two key defect types identified were line break defects induced by small particulates and airborne contaminants which result in local adhesion failure. After identification, the root cause of the defect was determined, and corrective measures were taken to either eliminate or reduce the defect source. As a result, we have been able to reduce defectivity levels by more than three orders of magnitude in only 12 months and are now achieving defectivity adders as small as 2 adders per lot of wafers.

High-throughput jet and flash imprint lithography for advanced semiconductor memory

Imprint lithography has been shown to be an effective technique for replication of nano-scale features. Jet and Flash Imprint Lithography (J-FIL) involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. Non-fill defectivity must always be considered within the context of process throughput. Processing steps such as resist exposure time and mask/wafer separation are well understood, and typical times for the steps are on the order of 0.10 to 0.20 seconds. To achieve a total process throughput of 20 wafers per hour (wph), it is necessary to complete the fluid fill step in 1.0 seconds, making it the key limiting step in an imprint process. Recently, defect densities of less than 1.0/cm2 have been achieved at a fill time of 1.2 seconds by reducing resist drop size and optimizing the drop pattern. There are several parameters that can impact resist filling. Key parameters include resist drop volume (smaller is better), system controls (which address drop spreading after jetting), Design for Imprint or DFI (to accelerate drop spreading) and material engineering (to promote wetting between the resist and underlying adhesion layer). In addition, it is mandatory to maintain fast filling, even for edge field imprinting. This paper addresses the improvements made with reduced drop volume and enhanced surface wetting to demonstrate that fast filling can be achieved for both full fields and edge fields. By incorporating the changes to the process noted above, we are now attaining fill times of 1 second with non-fill defectivity of ~ 0.1 defects/cm2.

High throughput Jet and Flash Imprint Lithography for semiconductor memory applications

Imprint lithography has been shown to be an effective technique for replication of nano-scale features. Jet and Flash* Imprint Lithography (J-FIL*) involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. There are two critical components to meeting throughput requirements for imprint lithography. Using a similar approach to what is already done for many deposition and etch processes, imprint stations can be clustered to enhance throughput. The FPA-1200NZ2C is a four station cluster system designed for high volume manufacturing. For a single station, throughput includes overhead, resist dispense, resist fill time (or spread time), exposure and separation. Resist exposure time and mask/wafer separation are well understood processing steps with typical durations on the order of 0.10 to 0.20 seconds. To achieve a total process throughput of 15 wafers per hour (wph) for a single station, it is necessary to complete the fluid fill step in 1.5 seconds. For a throughput of 20 wph, fill time must be reduced to only one second. There are several parameters that can impact resist filling. Key parameters include resist drop volume (smaller is better), system controls (which address drop spreading after jetting), Design for Imprint or DFI (to accelerate drop spreading) and material engineering (to promote wetting between the resist and underlying adhesion layer). In addition, it is mandatory to maintain fast filling, even for edge field imprinting. In this paper, we address the improvements made in all of these parameters to enable a 1.50 second filling process for a sub-20nm device like pattern and have demonstrated this capability for both full fields and edge fields.