Vasanth Kakani

A 5-GHZ Low-Power Series-Coupled BiCMOS Quadrature VCO With Wide Tuning Range

This letter presents a novel quadrature voltage controlled oscillator (QVCO) implemented in a 47-GHz SiGe BiCMOS technology. The QVCO is a serially coupled LC VCO that utilizes SiGe heterojunction bipolar transistors for oscillation and metal oxide semiconductor field effect transistors for coupling. The SiGe BiCMOS QVCO prototype achieves about 14.6% tuning range from 4.3 to 5GHz. The phase noise of the QVCO is measured as -114.3 dBc/Hz at 2-MHz offset. The 5-GHz QVCO core consumes 6-mA current from a 3.3-V power supply and occupies 0.88mm2 area

A 9-Bit 6.3GHz 2.5W Quadrature Direct Digital Synthesizer MMIC

This paper describes a 9-bit, 6.3GHz low power quadrature DDS implemented in a 0.18mum SiGe BiCMOS technology. With a 9-bit accumulator and two sine-weighted DACs, this DDS is capable of generating quadrature sinusoidal waveforms up to 3.15GHz. The quadrature DDS MMIC occupies an active area of 2.3x2.5mm2 and consumes a total 2.5W power.

A 9-Bit 9.6GHz 1.9W Direct Digital Synthesizer RFIC Implemented In 0.18μm SiGe BiCMOS Technology

This paper presents a low power SiGe DDS MMIC with 9-bit phase and 8-bit amplitude resolution. Using more than 9600 transistors, the active area of the DDS is 2.3 × 0.7 mm2. The maximum clock frequency was measured at 9.6 GHz with 4.8 GHz Nyquist output. The DDS MMIC consumes 1.9 W power consumption under 3.3 V/4.0 V dual power supplies. The DDS achieves the best reported power efficiency figure of merit of 5.1 GHz/W. The measured SFDR is 30 dBc with 2.4 GHz outputs at the maximum clock frequency.

A 4.2–4.7GHz, 3.7mW digitally controlled oscillator RFIC

This paper presents an 8-bit LC tuned digitally controlled oscillator (DCO) implemented in a 130nm CMOS technology. The DCO oscillation frequency can be tuned from 4.2 to 4.7GHz with 11.2% tuning range and an average frequency resolution of 2 MHz/bit. The oscillator consumes a 3.7mW power from a 1.2V power supply. The DCO phase noise is measured as −103dBc/Hz @ 500KHz offset and exhibits a figure of merit of −177.

Design and Analysis of a Transversal Filter RFIC in SiGe Technology

Filters are a critical component of every high-speed data communications system. Die area, power consumption, and RFIC integration are primary concerns for filter designers. The authors of this article have designed and fabricated a low-power analog filter with greatly reduced die area compared to passive delay lines. This transversal filter design has been realized in 47-GHz SiGe process technology.

A 5GHz Series Coupled BiCMOS Quadrature VCO with Wide Tuning Range

This paper presents a novel quadrature VCO (QVCO) implemented in a 47GHz SiGe technology. The QVCO is a serially coupled LC VCO that utilizes SiGe HBTs for oscillation and MOSFETs for coupling. The SiGe BiCMOS QVCO prototype achieves about 14.6 % tuning range from 4.3 to 5 GHz. The phase noise of the QVCO is measured as -115dBc/Hz @ 2MHz offset. The 5GHz QVCO core consumes 6mA current under 3.3V power supply and occupies 0.88mm2 area

An high speed integrated equalizer for dispersion compensation in 10Gb/s fiber networks

This paper presents the design of a high-speed analog transversal equalizer for dispersion compensation in 10Gbit/s fiber networks. We present design details of a seven tap transversal equalizer with delay amplifiers and tap variable gain amplifiers. The seven tap equalizer is implemented in a 47GHz SiGe technology.

A 25 GHz wide-tuning VCO RFIC implemented in 0.13 um SiGe BiCMOS technology

This paper presents the design and measurement of an integrated millimeter wave wideband voltage controlled oscillator (VCO). This VCO employs the on-chip transmission lines and hyper-abrupt junction varactors to form high Q resonator. The VCO RFIC was implemented in a 0.13um 200GHz ft SiGe hetero-junction bipolar transistor (HBT) BiCMOS technology. The VCO oscillation frequency is around 25GHz, targeting at the ultra wideband (UWB) and short range radar applications. The VCO phase noise was measured around −82.5dBc/Hz at 500 KHz frequency offset. It has a wide tuning range from 23.8GHz to 26.3GHz. The core of VCO circuit consumes 10mA current from a 2.2V power supply and occupies 0.56×0.205mm2 area.

A 3.5GHz Low Power Programmable Transversal Filter RFIC Implemented in 47GHz SiGe Technology

This paper presents the design of a low power 3.5GHz analog programmable filter RFIC. The RF filter is a 7-tap transversal equalizer with cascaded Cherry-Hooper amplifiers for delay stages and Gilbert variable gain amplifier as tap weights. The delay stage using active devices greatly reduces the die area comparing to passive delay lines. The SiGe programmable filter RFIC consumes 250mW under 3.3V supply and occupies total 2.16mm2 die size

Integrated electronic equalizer for dispersion compensation in 10 Gb/s fiber networks

The paper presents the design of a high-speed transversal equalizer for dispersion compensation in 10 Gb/s fiber networks. The five-tap equalizer is implemented in a 47 GHz SiGe technology. The equalizer circuit is optimized for minimum group delay and maximum bandwidth. With added feedback in the equalizer gain stage, we achieved minimum group delay of 0.7% data period. Polarization mode dispersion compensation has been demonstrated using the proposed transversal equalizer.