Veena Misra

Bonding constraints and defect formation at interfaces between crystalline silicon and advanced single layer and composite gate dielectrics

An increasingly important issue in semiconductor device physics is understanding of how departures from ideal bonding at silicon–dielectric interfaces generate electrically active defects that limit performance and reliability. Building on previously established criteria for formation of low defect density glasses, constraint theory is extended to crystalline silicon–dielectric interfaces that go beyond Si–SiO2 through development of a model that quantifies average bonding coordination at these interfaces. This extension is validated by application to interfaces between Si and stacked silicon oxide/nitride dielectrics demonstrating that as in bulk glasses and thin films, an average coordination, Nav, greater than three yields increasing defective interfaces.

A capacitance-based methodology for work function extraction of metals on high-/spl kappa/

This letter presents a methodology to accurately extract the work function of metal electrodes on high-/spl kappa/ dielectrics with various charge distributions. A mathematical analysis including sources of errors was used to study the effect of charge distribution in gate dielectric stacks on the flatband voltage of the device. The calculations are verified by experimental results obtained for Ru-Ta alloys on HfO/sub 2/ and SiO/sub 2/ gate dielectric stacks. It is shown that accounting for the appropriate charge model is imperative for accurate calculation of workfunction on high-/spl kappa//SiO/sub 2/ gate dielectric stacks.

Use of metal–oxide–semiconductor capacitors to detect interactions of Hf and Zr gate electrodes with SiO2 and ZrO2

Metal–oxide–semiconductor capacitors were used to study the interaction of Hf and Zr gate electrodes on SiO2, ZrSixOy, and ZrO2. A large reduction in the SiO2 equivalent oxide thickness accompanied by an increase in the leakage current was observed with Hf and Zr electrodes when subjected to anneal temperatures as low as 400 °C. The reduction in electrical thickness as observed from the capacitance–voltage measurements was attributed to the combination of (a) physical thinning of the SiO2 and (b) formation of a high-K layer. A severe instability of Zr and Hf electrodes was also observed on ZrSixOy and ZrO2 dielectrics. This behavior of Zr and Hf gates was attributed to high negative enthalpy of oxide formation and high oxygen solubility resulting in the reduction of the gate dielectric and subsequent oxygen diffusion to the gate electrode.

Electrical properties of Ru-based alloy gate electrodes for dual metal gate Si-CMOS

In this letter, low resistivity Ru and Ru-Ta alloy films, deposited via reactive sputtering, were evaluated as gate electrodes for p- and n-MOSFET devices, respectively. MOSFETs fabricated via a conventional process flow indicated that the work functions of Ru and Ru-Ta alloys were compatible with p- and n-MOSFET devices, respectively. Both of the metal gated devices eliminated gate depletion effects. Good MOSFET characteristics, such as I/sub DS/-V/sub GS/ and mobility, were obtained for both Ru-gated PMOSFETs and Ru-Ta gated NMOSFETs.

Transparent indium gallium zinc oxide transistor based floating gate memory with platinum nanoparticles in the gate dielectric

A transparent memory device has been developed based on an indium gallium zinc oxide thin film transistor by incorporating platinum nanoparticles in the gate dielectric stack as the charge storage medium. The transfer characteristics of the device show a large clockwise hysteresis due to electron trapping and are attributed to the platinum nanoparticles. Effect of the gate bias stress (program voltage) magnitude, duration, and polarity on the memory window characteristics has been studied. Charge retention measurements were carried out and a loss of less than 25% of the trapped elec-trons was observed over 104 s indicating promising application as nonvolatile memory.

A simple parameter extraction method for ultra-thin oxide MOSFETs

Abstract A simple parameter extraction technique is presented for ultra-thin oxide MOSFETs. The technique is based on a suitable MOSFET mobility model and extracts threshold voltage ( V t ), mobility ( μ 0 ), and two mobility degradation parameters θ 1 and θ 2 . It has been found that the extracted parameters accurately describe the measured current voltage characteristics for strong inversion.

Characterization of RuO2 electrodes on Zr silicate and ZrO2 dielectrics

The rutile stoichiometric phase of RuO2, deposited via reactive sputtering, was evaluated as a gate electrode on chemical vapor deposited ZrO2 and Zr silicate for Si–p-type metal–oxide–semiconductor (PMOS) devices. Thermal and chemical stability of the electrodes was studied at annealing temperatures of 400, 600, and 800 °C in N2. X-ray diffraction was measured to study grain structure and interface reactions. The resistivity of RuO2 films was 65.0 μΩ cm after 800 °C annealing. Electrical properties were evaluated on MOS capacitors, which indicated that the work function of RuO2 was ∼5.1 eV, compatible with PMOS devices. Post-RuO2 gate annealing up to 800 °C, resulted in only a 1.4 A equivalent oxide thickness (Tox-eq) change and 0.2 V flatband voltage change for Zr silicate and a 4 A Tox-eq change for ZrO2 dielectrics. Tantalum electrodes were also studied on ZrO2 as a comparison of the stability of RuO2 electrodes.

Electrical properties of RuO 2 gate electrodes for dual metal gate Si-CMOS

The rutile stoichiometric phase of RuO/sub 2/, deposited via reactive sputtering, was evaluated as a gate electrode for Si-PMOS devices. Thermal and chemical stability of the electrodes was studied at annealing temperatures of 400/spl deg/C and 600/spl deg/C in N/sub 2/. X-ray diffraction patterns were measured to study grain structure and interface reactions. Very low resistivity values were observed and were found to be a strong function of temperature. Electrical properties were evaluated on MOS capacitors, which indicated that the workfunction of RuO/sub 2/ was compatible with PMOS devices. Excellent stability of oxide thickness, flatband voltage and gate current as a function of temperature was also found. Breakdown fields were also measured for the samples before and after annealing.

Low-pressure rapid thermal chemical vapor deposition of oxynitride gate dielectrics for n-channel and p-channel MOSFETs

The properties of oxynitride gate dielectrics formed using a low-pressure, rapid thermal chemical vapor deposition (RTCVD) process with SiH/sub 4/, NH/sub 3/, and N/sub 2/O as the reactive gases are presented. Material analyses show an increase of uniform nitrogen and interfacial hydrogen content with increasing NH/sub 3//N/sub 2/O flow rate ratio. MOS capacitors with both n-type and p-type substrates and both n-channel and p-channel MOSFETs were analyzed electrically. The results show increasing fixed oxide charge and interface state density with increasing nitrogen and hydrogen content in the film. A decrease in peak transconductance and improved high-field transconductance was observed for n-channel MOSFETs. Improved resistance to hot-carrier interface state generation was also observed with increasing nitrogen concentration in the films. The results suggest that an optimal nitrogen concentration of approximately 3 at.% can be considered for further development of this technology.

Flexible Technologies for Self-Powered Wearable Health and Environmental Sensing

This article provides the latest advances from the NSF Advanced Self-powered Systems of Integrated sensors and Technologies (ASSIST) center. The work in the center addresses the key challenges in wearable health and environmental systems by exploring technologies that enable ultra-long battery lifetime, user comfort and wearability, robust medically validated sensor data with value added from multimodal sensing, and access to open architecture data streams. The vison of the ASSIST center is to use nanotechnology to build miniature, self-powered, wearable, and wireless sensing devices that can enable monitoring of personal health and personal environmental exposure and enable correlation of multimodal sensors. These devices can empower patients and doctors to transition from managing illness to managing wellness and create a paradigm shift in improving healthcare outcomes. This article presents the latest advances in high-efficiency nanostructured energy harvesters and storage capacitors, new sensing modalities that consume less power, low power computation, and communication strategies, and novel flexible materials that provide form, function, and comfort. These technologies span a spatial scale ranging from underlying materials at the nanoscale to body worn structures, and the challenge is to integrate them into a unified device designed to revolutionize wearable health applications.