Victor A. K. Temple

MOS-Controlled thyristors—A new class of power devices

A new class of power devices is described that is based on an optimal combination of MOS and thyristor elements. Devices of this class function in the ON-state and OFF-state in a manner indistinguishable from a thyristor yet can switch from on-to-off or off-to-on by applying a voltage to its MOS gate. Thus, the devices exhibit extremely low forward drop, high surge current capability, and enjoy negative thermal feedback. To turn off the device, one activates the gate so that FETs are turned on to effectively short one of the emitting junctions of the thyristor. These FETs need only block a maximum of about 1 V when off and carry a sizable current for about 1 µs when on. To turn on the device, any of the normal methods may be employed. However, it is most convenient to use the same MOS gate electrode (and polysilicon layer) and a voltage of the opposite polarity to turn on the thyristor with another FET-just as if it were a normal MOS gated thyristor. The current density that can be turned off depends on the density and effective resistance of the turn-off FETs while turn-on speed and di/ dt rating depend on the initial turn-on area, which in turn depends on the density of the ON-FETs. If the OFF-gate voltage is maintained during the desired OFF-state period, the device has, effectively, an infinite dv/dt capability. Switching speed is most similar to, but somewhat faster than, that of gate turn-off thyristors (GTOs) and, as in other bipolar devices, depends chiefly on carrier recombination time, device thickness, and turn-offdi/dt.

MOS Controlled thyristors (MCT's)

The feasibility of a new class of power devices which is based on an optimal combination of MOS and thyristor elements has been shown. Devices of this class function in the on-state and off-state in a manner indistinguishable from a thyristor, yet can switch from on-to-off or off-to-on by applying a voltage to its MOS gate. Thus, the devices exhibit extremely low forward drop, high surge current capability and enjoy negative thermal feedback. To turn off the device, one activates the gate so that FETs are turned on to effectively short one of the emitting junctions of the thyristor. These FETs need only block a maximum of about IV when off and carry a sizable current for about a microsecond when on. To turn on the device, any of the normal methods may be employed. However, it is most convenient to use the same MOS gate electrode (and polysilicon layer) and a voltage of the opposite polarity to turn on the thyristor with another FET - just as if it were a normal MOS gated thyristor. The current density that can be turned off depends on the density and effective resistance of the turn-off FETs, while turn-on speed and di/dt rating depend on the initial turn-on area which, in turn, depends on the density of the on-FETs. If the off-gate voltage is maintained during the desired off-state period, the device has, effectively, an infinite dv/dt capability. Switching speed is most similar to, but somewhat faster than, that of GTOs (Gate Turn-Off thyristors) and, as in other bipolar devices, depends chiefly on carrier recombination time, device thickness and turn-off di/dt.

Theory and breakdown voltage for planar devices with a single field limiting ring

The use of one or more floating field limiting rings reduces the adverse effect of junction curvature on the breakdown voltage in planar devices. Although this has been known for some time, there has not been a way of accurately predicting the amount of improvement that can be achieved using field rings. In this paper, a computer algorithm is presented which makes it possible to perform field calculations on devices with floating field rings. In addition, a normalized curve is presented which shows the relative improvement that a single optimally placed field ring has on the breakdown voltage for any planar device. The basis of the construction of this curve is the use of a normalized radius of curvature which is a precise measure of the effect of curvature for any device. The theoretical predictions are compared with experiments for over 640 devices encompassing 16 different field ring locations. Good agreement is achieved between theory and experiment.

Junction termination extension for near-ideal breakdown voltage in p-n junctions

Extremely high breakdown voltages with very low leakage current have been achieved in plane and planar p-n junctions by using an ion-implanted junction extension for precise control of the depletion region charge in the junction termination. A theory is presented that shows a greatly improved control of both the peak surface and bulk electric fields in reverse biased p-n junctions. Experimental results show breakdown voltages greater than 95 percent of the ideal breakdown voltage with lower leakage currents than corresponding unimplanted devices. As an example, plane-junction moat-etch-terminated diodes with a normal breakdown voltage of 1050 V and a 0.5-mA leakage current become 1400 V (1450 ideal) devices with a 5-µA leakage current. Planar junctions, which broke down at 300 V, blocked as much as 1400 V if JTE terminated. Since planar junctions are of the greatest interest, we incorporated multiple field ring, field plate, and JTE terminations on a mask set and fabricated and tested thousands of devices. The results clearly showed that the ideal breakdown voltage can be achieved with less than 200 µm with JTE, where the same area would lead to 30 to 45 percent of the ideal with field rings and up to 40 to 50 percent of the ideal when used with field rings combined with field plates. Eight rings, even combined with a field plate, yielded less than 80 percent of the ideal breakdown voltage and required about 400 µm of device periphery.

Junction termination extension (JTE), A new technique for increasing avalanche breakdown voltage and controlling surface electric fields in P-N junctions

Extremely high breakdown voltages with very low leakage current have been achieved in plane and planar p-n junctions using an ion implanted junction extension for precise control of the depletion region charge in the junction termination. Theory is presented which shows a greatly improved control of both the peak surface and bulk electric fields in reverse biased p-n junctions. Experimental results show breakdown voltages better than 95% of the ideal and at lower leakage current than the corresponding unimplanted devices. For example, diodes with a normal breakdown voltage of 1050 volts with a .5ma leakage current become 1400 volt (1450 ideal) devices with a 5µa leakage current. Applications of the technique are feasible in MOS technology, as would be expected, but are even more attractive in power devices in which the dramatically reduced surface fields are just as important as the extremely high breakdown voltages since it means more flexibility in passivation techniques, two of which we have used to date. Our results have also shown that the implant can be at a variety of temperatures with a good degree of success, extra process flexibility being the goal of these tests.

A 600-volt MOSFET designed for low on-resistance

A 600-V vertical power MOSFET with low on-resistance is described. The low resistance is achieved by means of achieving near-ideal drain junction breakdown voltage and reduced drain spreading resistance from the use of an extended channel design. The various tradeoffs inherent in the design are discussed. Both calculated and experimental data are presented. The remote source configuration of the experimental device is also discussed.

Calculation of the diffusion curvature related avalanche breakdown in high-voltage planar p-n junctions

Avalanche multiplication calculations are performed in high-voltage planar p-n junctions to determine breakdown voltage limitations imposed by curvature effects. The issue of choice of ionization coefficient for avalanche multiplication is discussed. From the calculations, a series of design curves and equations are generated which relate the breakdown voltage and peak electric field to those of an ideal junction of the same doping profile, the critical parameters being the substrate doping concentration, the diffusion profile, and the ratio of the radius of curvature to the substrate depletion width for the ideal one-dimensional case. With appropriate distance normalization, these curves and equations can be reduced to a single curve and a single equation. The agreement between theory and experiment is consistently good provided the correct ionization coefficients are used in the theory.

Optimizing carrier lifetime profile for improved trade-off between turn-off time and forward drop

The trade-off between forward voltage drop and device turn-off time can be significantly altered by the proper location of a narrow region of lower lifetime, oriented perpendicular to the current flow. The proposed structure is discussed and calculations are presented to illustrate this alteration. In addition, differences in thyristor turnoff and diode turn-off in an inductive circuit and when driven by a perfect voltage source are investigated. Portions of this investigation were reported at the 1979 and 1980 PESC Conferences.

Controlled turn-on thyristors

In a one or more amplified stage thyristor design it is possible to control the peak current level of all but the final stage with impedance built into the p-base zone. This impedance reduces both the current and the duty cycle of the protected amplifying stage effectively protecting it from undesirable temperature rises during turn-on. A further bonus and perhaps equally important is the fact that the amplifying stage and its current control impedance can be used to reduce and essentially fix the voltage level at which the following stage turns on. This results in a lower voltage, lower stress turn-on of the following stage, and a device essentially protected from di/dt turn-on failure. This paper describes several aspects of controlled turn-on in the context of a 2.6- and 6-kV light triggered thyristor. In particular we discuss selection of the resistor value, the problem of unwanted current control resistor modulation by device current as well as some factors affecting the proper wattage of such resistors. We also discuss the role current control resistors can play in controlling avalanche current from known locations on the device.

Increased avalanche breakdown voltage and controlled surface electric fields using a junction termination extension (JTE) technique

Extremely high breakdown voltages with very low leakage current have been achieved in plane and planar p-n junctions by using an ion-implemented junction extension for precise control of the depletion region charge in the junction termination. A theory is presented which shows a greatly improved control of both the peak surface and bulk electric fields in reverse biased p-n junctions. Experimental results show breakdown voltages greater than 95 percent of the ideal breakdown voltage with lower leakage currents than corresponding unimplanted devices. As an example, diodes with a normal breakdown voltage of 1050 V and a 0.5 mA leakage current become 1400 V (1450 ideal) devices with a 5 µA leakage current. Applications of the junction termination technique is feasible in MOS technology, but is more attractive in power devices where reduced surface fields are as important as the extremely high breakdown voltages. Reduced surface fields allow more flexibility in passivation techniques, two of which we have used to date. Our results also show that the implant can be activated at a variety of temperatures with a good degree of success; process flexibility being the goal of these tests.