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Victor Ku

IBM

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Publication

Featured researches published by Victor Ku.

The Japan Society of Applied Physics | 2003

Low Tinv (≤ 1.8 nm) Metal-Gated MOSFETs on SiO2 Based Gate Dielectrics for High Performance Logic Applications

Victor Ku; R. Amos; A. Steegen; C. Cabral; Vijay Narayanan; P. Jamison; P. Nguyen; Y. Li; M. Gribelyuk; Y.Y. Wang; J. Cai; A. Callegari; F. R. McFeely; F. Jamin; K. Wong; E. Wu; A. Chou; Diane C. Boyd; H. Ng; Meikei Ieong; Clement Wann; R. Jammy; Wilfried Haensch

V. Ku, R. Amos, A. Steegen, C. Cabral, Jr.*, V. Narayanan*, P. Jamison*, P. Nguyen, Y. Li, M. Gribelyuk, Y. Wang, J. Cai*, A. Callegari*, F. McFeely*, F. Jamin, K. Wong, E. Wu, A. Chou, D. Boyd*, H. Ng, M. Ieong*, C. Wann, R. Jammy*, and W. Haensch* IBM Semiconductor Research and Development Center, Hopewell Junction, NY 12533, USA IBM T.J. Watson Research Center, Yorktown Heights, NY 10598, USA E-mail: [email protected], Phone: (845) 894-7011 Fax: (845) 892-6462

Archive | 2005

Process options of forming silicided metal gates for advanced CMOS devices

Ricky S. Amos; D. A. Buchanan; Cyril Cabral; Evgeni Gousev; Victor Ku; A. Steegen

Archive | 2003

Method for forming metal replacement gate of high performance

Cyril Cabral; P. Jamison; Victor Ku; Ying Li; Vijay Narayanan; A. Steegen; Yun-Yu Wang; Kwong Hon Wong

Archive | 2004

FET gate structure with metal gate electrode and silicide contact

Victor Ku; A. Steegen; Hsing Jen Wann

Archive | 2003

Method of manufacturing a disposable reversed spacer process for high performance recessed channel CMOS

Meikei Ieong; Omer H. Dokumaci; Thomas S. Kanarsky; Victor Ku

Archive | 2004

Structure and method for metal replacement gate of high performance

Cyril Cabral; P. Jamison; Victor Ku; Ying Li; Vijay Narayanan; A. Steegen; Yun-Yu Wang; Kwong Hon Wong

Archive | 2006

Cmos silicide metal gate integration

Ricky S. Amos; Diane C. Boyd; Cyril Cabral; Richard D. Kaplan; Jakub Kedzierski; Victor Ku; Woo Hyeong Lee; Ying Li; Anda C. Mocuta; Vijay Narayanan; A. Steegen; Maheswaren Surendra

Archive | 2002

Method and structure of a disposable reversed spacer process for high performance recessed channel CMOS

Meikei Ieong; Omer H. Dokumaci; Thomas S. Kanarsky; Victor Ku

Archive | 2004

Method of forming fet silicide gate structures incorporating inner spacers

Victor Ku; A. Steegen; Hsing-Jen C. Wann; Keith Kwong Hon Wong

Archive | 2001

Fabrication of notched gates by passivating partially etched gate sidewalls and then using an isotropic etch

Victor Ku; Maheswaran Surendra; Len Y. Tsou; Y. Zhang

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Collaboration

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A. Steegen

IBM

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Vijay Narayanan

IBM

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Cyril Cabral

IBM

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P. Jamison

IBM

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Ying Li

IBM

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Kwong Hon Wong

IBM

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Atul C. Ajmera

IBM

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Dominic J. Schepis

IBM

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Jakub Kedzierski

IBM

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Ka Hing Fung

IBM

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