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Dive into the research topics where Vitor A. P. Aguiar is active.

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Featured researches published by Vitor A. P. Aguiar.


Anais Da Academia Brasileira De Ciencias | 2013

Luminescence characteristics of quartz from Brazilian sediments and constraints for OSL dating

Carlos Conforti Ferreira Guedes; André O Sawakuchi; Paulo César Fonseca Giannini; Regina DeWitt; Vitor A. P. Aguiar

This study analyzes the optically stimulated luminescence (OSL) characteristics of quartz grains from fluvial, eolian and shallow marine sands of northeastern and southeastern Brazil, with especial focus on the applicability of the single-aliquot regenerative dose (SAR) dating protocol. All analyzed Brazilian sediments presented relatively high OSL sensitivity and good behavior regarding their luminescence characteristics relevant for radiation dose estimation. However, some samples from the Lencois Maranhenses region in northeastern Brazil showed inadequate OSL sensitivity correction, hampering the implementation of the SAR protocol and their ability to behave as a natural dosimeter. While the shallow marine and eolian samples showed a narrow and reliable dose distribution, the fluvial sample had a wide dose distribution, suggesting incomplete bleaching and natural doses estimates dependent on age models.


IEEE Transactions on Nuclear Science | 2017

Analyzing Reliability and Performance Trade-Offs of HLS-Based Designs in SRAM-Based FPGAs Under Soft Errors

Lucas A. Tambara; Jorge L. Tonfat; André Quincozes dos Santos; Fernanda Lima Kastensmidt; N. H. Medina; N. Added; Vitor A. P. Aguiar; Fernando Aguirre; Marcilei A. G. Silveira

The increasing system complexity of FPGA-based hardware designs and shortening of time-to-market have motivated the adoption of new designing methodologies focused on addressing the current need for high-performance circuits. High-Level Synthesis (HLS) tools can generate Register Transfer Level (RTL) designs from high-level software programming languages. These tools have evolved significantly in recent years, providing optimized RTL designs, which can serve the needs of safety-critical applications that require both high performance and high reliability levels. However, a reliability evaluation of HLS-based designs under soft errors has not yet been presented. In this work, the trade-offs of different HLS-based designs in terms of reliability, resource utilization, and performance are investigated by analyzing their behavior under soft errors and comparing them to a standard processor-based implementation in an SRAM-based FPGA. Results obtained from fault injection campaigns and radiation experiments show that it is possible to increase the performance of a processor-based system up to 5,000 times by changing its architecture with a small impact in the cross section (increasing up to 8 times), and still increasing the Mean Workload Between Failures (MWBF) of the system.


IEEE Transactions on Nuclear Science | 2016

Analysis of SRAM-Based FPGA SEU Sensitivity to Combined EMI and TID-Imprinted Effects

Juliano Benfica; Bruno Green; Bruno C. Porcher; Letícia Maria Bolzani Poehls; Fabian Vargas; N. H. Medina; N. Added; Vitor A. P. Aguiar; Eduardo L. A. Macchione; Fernando Aguirre; Marcilei A. G. Silveira; Martin Perez; Miguel Sofo Haro; I. Sidelnik; J. Jeronimo Blostein; J. Lipovetzky; Eduardo Augusto Bezerra

This work proposes a novel methodology to evaluate SRAM-based FPGAs susceptibility with respect to Single-Event Upset (SEU) as a function of noise on VDD power pins, TotalIonizing Dose (TID) and TID-imprinted effect on BlockRAM cells. The proposed procedure is demonstrated for SEU measurements on a Xilinx Spartan 3E FPGA operating in an 8 MV Pelletron accelerator for the SEU test with heavy-ions, whereas TID was deposited by means of a Shimadzu XRD-7000 X-ray diffractometer. In order to observe the TID-induced imprint effect inside the BlockRAM cells, a second SEU test with neutrons was performed with Americium/Beryllium (241AmBe). The noise was injected into the power supply bus according to the IEC 61.000-4-29 standard and consisted of voltage dips with 16.67% and 25% of the FPGAs VDD at frequencies of 10 Hz and 5 kHz, respectively. At the end of the experiment, the combined SEU failure rate, given in error/bit.day, is calculated for the FPGAs BlockRAM cells. The combined failure rate is defined as the average SEU failure rate computed before and after exposition of the FPGA to the TID.


radiation effects data workshop | 2015

Heavy Ions Induced Single Event Upsets Testing of the 28 nm Xilinx Zynq-7000 All Programmable SoC

Lucas A. Tambara; Fernanda Lima Kastensmidt; N. H. Medina; N. Added; Vitor A. P. Aguiar; Fernando Aguirre; Eduardo L. A. Macchione; Marcilei A. G. Silveira

The recent advance of silicon technology has allowed the integration of complex systems in a single chip. Nowadays, Field Programmable Gate Array (FPGA) devices are composed not only of the programmable fabric but also by hard-core processors, dedicated processing block interfaces to various peripherals, on-chip bus structures and analog blocks. Among the latest released devices of this type, this work focuses in the 28 nm Xilinx Zynq-7000 All Programmable SoC (APSoC). While not immune to the radiation environment in space, the Zynq-7000 seems to be very attractive for the aerospace sector due to its high computational power capability and low-power consumption. In this work, results from heavy ions testing for Zynq-7000 are presented. The experiments were performed in a Brazilian facility located at the University of São Paulo, Brazil.


european conference on radiation and its effects on components and systems | 2015

Analysis of SRAM-Based FPGA SEU Sensitivity to Combined Effects of Conducted EMI and TID

Juliano Benfica; Bruno Green; Bruno C. Porcher; Letícia Maria Bolzani Poehls; Fabian Vargas; N. H. Medina; N. Added; Vitor A. P. Aguiar; Eduardo L. A. Macchione; Fernando Aguirre; Marcilei A. G. Silveira; Eduardo Augusto Bezerra

This work proposes a novel methodology to evaluate SRAM-Based FPGA SEU susceptibility to noise on VDD power pins and total-ionizing dose (TID). The procedure was demonstrated for SEU measurements on a Xilinx Spartan 3E FPGA operating in an 8MV Pelletron accelerator, whereas TID was deposited by means of a Shimadzu XRD-7000 X-ray diffractometer. The injected noise on power supply bus comprised of voltage dips of 16.67% and 25% of VDD at two different frequencies 10Hz and 5kHz, and was performed according to the IEC 61.000-4-29 international standard.


Journal of Physics: Conference Series | 2015

A Commercial off-the-shelf pMOS Transistor as X-ray and Heavy Ion Detector

Marcilei A. G. Silveira; M A A Melo; Vitor A. P. Aguiar; A Rallo; Roberto B. B. Santos; N. H. Medina; N. Added; L. E. Seixas; F G Leite; F G Cunha; K H Cirne; Renato Giacomini; J A de Oliveira

Recently, p-channel metal-oxide-semiconductor (pMOS) transistors were suggested as fit for the task of detecting and quantifying ionizing radiation dose. Linearity, small detection volume, fast readout, portability, low power consumption and low radiation attenuation are some of the pMOS advantages over PIN diode and thermoluminiscent dosimeters. A hand-held measurement system using a low power commercial off-the-shelf pMOSas the sensor would have a clear advantage due to the lower cost incurred by a standard technological process. In this research work, we tested the commercial device 3N163 regarding its behaviouras an X-ray sensor, as well as its possible application as a heavy-ion detector. To study the radiation effects of X-rays, a XRD-7000 (Shimadzu) X-ray diffraction setup was used to produce 10-keV effective energy photons. Heavy ions tests involved 12C, 16O, 19F, 28Si, 35Cl, 63Cu and 107Ag beams scattered at 15° by a 275 μg/cm2 gold target, which provide LETs (Linear Energy Transfer) from 4 to 40 MeV/mg/cm2. The signal readout was done using a 1 GHz oscilloscope with a 10-Gsamples/s conversion rate, high enough to permit the recording of transient pulses in the drain current. In this case, an ion can cause a current signal proportional to the ion beam used. Through this study it was found that a simple commercial pMOS device can be reliably used as a detector of X-rays as well as heavy ion detector.


radiation effects data workshop | 2014

First Successful SEE Measurements with Heavy Ions in Brazil

N. H. Medina; Marcilei A. G. Silveira; N. Added; Vitor A. P. Aguiar; Renato Giacomini; Eduardo L. A. Macchione; M. A. A. de Melo; Roberto B. B. Santos; L. E. Seixas

In this work, the first successful SEE measurements with heavy ions in Brazil is reported. The heavy ions were produced at the São Paulo 8 UD Pelletron accelerator. <sup>12</sup>C, <sup>16</sup>O, <sup>19</sup>F, <sup>28</sup>Si, <sup>35</sup>Cl, <sup>63</sup>Cu and <sup>107</sup>Ag heavy ion beams were used to test a commercial off-the-shelf transistor. During irradiation, the response of a pMOS transistor was continuously monitored to measure the SEE events. In order to achieve a uniform low intensity beam the heavy ions were Rutherford scattered at 15<sup>0</sup> by a 275 μg/cm<sup>2</sup> gold foil.


XXXII BRAZILIAN WORKSHOP ON NUCLEAR PHYSICS | 2010

Absorbed Gamma‐Ray Doses due to Natural Radionuclides in Building Materials

Vitor A. P. Aguiar; N. H. Medina; Ramon H. Moreira; Marcilei A. G. Silveira

This work is devoted to the application of high‐resolution gamma‐ray spectrometry in the study of the effective dose coming from naturally occurring radionuclides, namely 40K, 232Th and 238U, present in building materials such as sand, cement, and granitic gravel. Four models were applied to estimate the effective dose and the hazard indices. The maximum estimated effective dose coming from the three reference rooms considered is 0.90(45) mSv/yr, and maximum internal hazard index is 0.77(24), both for the compact clay brick reference room. The principal gamma radiation sources are cement, sand and bricks.


IEEE Transactions on Nuclear Science | 2017

Analyzing the Influence of the Angles of Incidence and Rotation on MBU Events Induced by Low LET Heavy Ions in a 28-nm SRAM-Based FPGA

Jorge Tonfat; Fernanda Lima Kastensmidt; Laurent Artola; Guillaume Hubert; N. H. Medina; N. Added; Vitor A. P. Aguiar; Fernando Aguirre; Eduardo L. A. Macchione; Marcilei A. G. Silveira

This paper shows the impact of low linear energy transfer heavy ions on the reliability of 28-nm Bulk static random access memory (RAM) cells from Artix-7 field-programmable gate array. Irradiation tests on the ground showed significant differences in the multiple bit upset cross section of configuration RAM and block RAM memory cells under various angles of incidence and rotation of the device. Experimental data are analyzed at transistor level by using the single-event effect prediction tool called multiscale single-event phenomenon prediction platform coupled with SPICE simulations.


2017 18th IEEE Latin American Test Symposium (LATS) | 2017

Analysis of single-event upsets in a Microsemi ProAsic3E FPGA

Paulo Ricardo Cechelero Villa; Roger Goerl; Fabian Vargas; Letícia Maria Bolzani Poehls; N. H. Medina; N. Added; Vitor A. P. Aguiar; Eduardo L. A. Macchione; Fernando Aguirre; Marcilei A. G. Silveira; Eduardo Augusto Bezerra

The desirable use of Field-Programmable Gate Arrays (FPGAs) in aerospace & defense field has become a general consensus among IC and embedded system designers. Radiation-hardened (rad-hard) electronics used in this domain is regulated under severe and complex political and commercial treaties. In order to refrain from these undesired political and commercial barriers COTS FPGAs (despite the fact of their low reliability) have been considered as a promising alternative to replace rad-hard ICs. Moreover, SRAM-based FPGAs are pretermitted with respect to flash or anti-fuse devices. In this scenario, this paper analyses, by means of heavy-ion accelerator experiments, the Single-Event Upset (SEU) tolerance of the Microsemi ProAsic3E A3PE1500 COTS FPGA. This component is under pre-qualification process for use in some satellites of the Brazilian Space Program. Preliminary results are herein briefly presented and discussed. These experimental results allow us to consider this component as a strong candidate to replace rad-hard FPGAs, if its use is combined with strict system-level fault-tolerant strategies for error detection and correction.

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N. H. Medina

University of São Paulo

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N. Added

University of São Paulo

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Fabian Vargas

The Catholic University of America

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Fernanda Lima Kastensmidt

Universidade Federal do Rio Grande do Sul

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Roberto B. B. Santos

Centro Universitário da FEI

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Renato Giacomini

Centro Universitário da FEI

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Bruno C. Porcher

The Catholic University of America

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