Vladimir Levinski

Differential signal scatterometry overlay metrology: an accuracy investigation

The overlay control budget for the 32nm technology node will be 5.7nm according to the ITRS. The overlay metrology budget is typically 1/10 of the overlay control budget resulting in overlay metrology total measurement uncertainty (TMU) requirements of 0.57nm for the most challenging use cases of the 32nm node. The current state of the art imaging overlay metrology technology does not meet this strict requirement, and further technology development is required to bring it to this level. In this work we present results of a study of an alternative technology for overlay metrology - Differential signal scatterometry overlay (SCOL). Theoretical considerations show that overlay technology based on differential signal scatterometry has inherent advantages, which will allow it to achieve the 32nm technology node requirements and go beyond it. We present results of simulations of the expected accuracy associated with a variety of scatterometry overlay target designs. We also present our first experimental results of scatterometry overlay measurements, comparing this technology with the standard imaging overlay metrology technology. In particular, we present performance results (precision and tool induced shift) and address the issue of accuracy of scatterometry overlay. We show that with the appropriate target design and algorithms scatterometry overlay achieves the accuracy required for future technology nodes.

Overlay accuracy fundamentals

Currently, the performance of overlay metrology is evaluated mainly based on random error contributions such as precision and TIS variability. With the expected shrinkage of the overlay metrology budget to < 0.5nm, it becomes crucial to include also systematic error contributions which affect the accuracy of the metrology. Here we discuss fundamental aspects of overlay accuracy and a methodology to improve accuracy significantly. We identify overlay mark imperfections and their interaction with the metrology technology, as the main source of overlay inaccuracy. The most important type of mark imperfection is mark asymmetry. Overlay mark asymmetry leads to a geometrical ambiguity in the definition of overlay, which can be ~1nm or less. It is shown theoretically and in simulations that the metrology may enhance the effect of overlay mark asymmetry significantly and lead to metrology inaccuracy ~10nm, much larger than the geometrical ambiguity. The analysis is carried out for two different overlay metrology technologies: Imaging overlay and DBO (1st order diffraction based overlay). It is demonstrated that the sensitivity of DBO to overlay mark asymmetry is larger than the sensitivity of imaging overlay. Finally, we show that a recently developed measurement quality metric serves as a valuable tool for improving overlay metrology accuracy. Simulation results demonstrate that the accuracy of imaging overlay can be improved significantly by recipe setup optimized using the quality metric. We conclude that imaging overlay metrology, complemented by appropriate use of measurement quality metric, results in optimal overlay accuracy.

Overlay quality metric

As overlay budget continues to shrink, an improved analysis of the different contributors to this budget is needed. A major contributor that has never been quantified is the accuracy of the measurements. KLA-Tencor developed a quality metric, that calculates and attaches an accuracy value to each OVL target. This operation is performed on the fly during measurement and can be applied without affecting MAM time or throughput. Using a linearity array we demonstrate that the quality metric identifies targets deviating from the intended OVL value, with no false alarms.

Diffraction order control in overlay metrology : a review of the roadmap options

Resolution enhancement in advanced optical lithography will reach a new plateau of complexity at the 32 nm design rule manufacturing node. In order to circumvent the fundamental optical resolution limitations, ultra low k1 printing processes are being adopted, which typically involve multiple exposure steps. Since alignment performance is not fundamentally limited by resolution, it is expected to yield a greater contribution to the effort to tighten lithographic error budgets. In the worst case, the positioning budget usually allocated to a single patterning step is divided between two. A concurrent emerging reality is that of high order overlay modeling and control. In tandem with multiple exposures, this trend creates great pressure to reduce scribeline target real estate per exposure. As the industry migrates away from metrology targets formed from large isolated features, the adoption of dense periodic array proxies brings improved process compatibility and information density as epitomized by the AIM target1. These periodic structures enable a whole range of new metrology sensor architectures, both imaging and scatterometry based, that rely on the principle of diffraction order control and which are no longer aberration limited. Advanced imaging techniques remain compatible with side-by-side targets while scatterometry methods require grating-over-grating targets. In this paper, a number of different imaging and scatterometry architectures are presented and compared in terms of random errors, systematic errors and scribespace requirements. It is asserted that an optimal solution must combine the TMU peak performance capabilities of scatterometry with the cost of ownership advantages of target size and multi-layer capabilities of imaging.

Target noise in overlay metrology

We have developed a method for calculating the statistical effects of spatial noise on the overlay measurement extracted from a given overlay target. The method has been applied to two kinds of overlay targets on three process layers, and the new metric, Target Noise, has been shown to correlate well to the random component of Overlay Mark Fidelity. A significant difference in terms of robustness has been observed between AIM targets and conventional Frame-in-Frame targets. The results fit well into the spatial noise hierarchy presented in this paper.

Lithography aware overlay metrology target design method

We present a metrology target design (MTD) framework based on co-optimizing lithography and metrology performance. The overlay metrology performance is strongly related to the target design and optimizing the target under different process variations in a high NA optical lithography tool and measurement conditions in a metrology tool becomes critical for sub-20nm nodes. The lithography performance can be quantified by device matching and printability metrics, while accuracy and precision metrics are used to quantify the metrology performance. Based on using these metrics, we demonstrate how the optimized target can improve target printability while maintaining the good metrology performance for rotated dipole illumination used for printing a sub-100nm diagonal feature in a memory active layer. The remaining challenges and the existing tradeoff between metrology and lithography performance are explored with the metrology target designer’s perspective. The proposed target design framework is completely general and can be used to optimize targets for different lithography conditions. The results from our analysis are both physically sensible and in good agreement with experimental results.

Scanner focus metrology for advanced node scanner monitoring and control

Scanner Focus window of the lithographic process becomes much smaller due to the shrink of the device node and multipatterning approach. Consequently, the required performance of scanner focus becomes tighter and more complicated. Focus control/monitoring methods such as “field-by-field focus control” or “intra-field focus control” is a necessity. Moreover, tight scanner focus performance requirement starts to raise another fundamental question: accuracy of the reported scanner focus. The insufficient accuracy of the reported scanner focus using the existing methods originates from: a) Focus measurement quality, which is due to low sensitivity of measured targets, especially around the nominal production focus. b) The scanner focus is estimated using special targets, e.g. large pitch target and not using the device-like structures (irremovable aberration impact). Both of these factors are eliminated using KLA-Tencor proprietary “Focus Offset” technology.

Process resilient overlay target designs for advanced memory manufacture

In recent years, lithographic printability of overlay metrology targets for memory applications has emerged as a significant issue. Lithographic illumination conditions such as extreme dipole, required to achieve the tightest possible pitches in DRAM pose a significant process window challenge to the metrology target design. Furthermore, the design is also required to track scanner aberration induced pattern placement errors of the device structure. Previous workiii, has shown that the above requirements have driven a design optimization methodology which needs to be tailored for every lithographic and integration scheme, in particular self-aligned double and quadruple patterning methods. In this publication we will report on the results of a new target design technique and show some example target structures which, while achieving the requirements specified above, address a further critical design criterion – that of process resilience.

Imaging simulations of optimized overlay marks with deep sub-resolution features

Bright field imaging based metrology performance enhancement is essential in the quest to meet lithography process control requirements below 65 nm half pitch. Recent work has shown that, in parallel to the lithographic processes themselves, the metrology tools are able to continue to perform despite the fact that the size of the features under test are often below the classical Rayleigh resolution limit of the optical system. Full electromagnetic simulation is a mandatory tool in the investigation and optimization of advanced metrology tool and metrology target architectures. In this paper we report on imaging simulations of overlay marks. We benchmark different simulation platforms and methods, focusing in particular on the challenges associated with bright-field imaging overlay metrology of marks with feature sizes below the resolution limit. In particular, we study the dependence of overlay mark contrast and information content on overlay mark pitch and feature size.