Wanbing Yi

Integrated two-terminal device and logic device with compact interconnects having shallow via for embedded application

MAGNETIC TUNNEL JUNCTION STACK ALIGNMENT SCHEME

MAGNETIC SHIELDING FOR MTJ DEVICE OR BIT

INTEGRATED CIRCUIT STRUCTURES WITH SPIN TORQUE TRANSFER MAGNETIC RANDOM ACCESS MEMORY ULTILIZING ALUMINUM METALLIZATION LAYERS AND METHODS FOR FABRICATING THE SAME

MRAM CHIP MAGNETIC SHIELDING

INTEGRATED MAGNETIC RANDOM ACCESS MEMORY WITH LOGIC DEVICE HAVING LOW-K INTERCONNECTS

LOGIC COMPATIBLE MEMORY

3D MRAM WITH THROUGH SILICON VIAS OR THROUGH SILICON TRENCHES MAGNETIC SHIELDING

INTEGRATED CIRCUITS INCLUDING MAGNETIC CORE INDUCTORS AND METHODS FOR FABRICATING THE SAME

Magnetic memory device and method of forming thereof