Wataru Mizubayashi

Experimental evidence for the flatband voltage shift of high-k metal-oxide-semiconductor devices due to the dipole formation at the high-k∕SiO2 interface

We have examined an origin of the flatband voltage (VFB) shift in metal-oxide-semiconductor capacitors by employing bilayer high-k gate dielectrics consisting of HfO2 and Al2O3 on the interfacial SiO2 layer. We found that the high-k∕SiO2 interface affects the VFB shift through an electrical dipole layer formation at its interface, regardless of the gate electrode materials. Furthermore, we demonstrated that the VFB shift in the metal/high-k gate stack is determined only by the dipole at high-k∕SiO2 interface, while for the Si-based gate it is determined by both gate/high-k and high-k∕SiO2 interfaces.

Limit of gate oxide thickness scaling in MOSFETs due to apparent threshold voltage fluctuation induced by tunnel leakage current

We report on a new roadblock which will limit the gate oxide thickness scaling of MOSFETs. It is found that statistical distribution of direct tunnel leakage current through 1.2 to 2.8 nm thick gate oxides induces significant fluctuations in the threshold voltage and transconductance when the gate oxide tunnel resistance becomes comparable to gate poly-Si resistance. By calculating the measured tunnel current based on multiple scattering theory, it is shown that the device characteristics fluctuations will be problematic when the gate oxide thickness is scaled down to less than 1 nm.

Analysis of Tunnel Current through Ultrathin Gate Oxides

Tunnel current through 1.27-8.12-nm-thick gate oxides has been calculated on the basis of multiple-scattering theory, in which the SiO2 layer is segmented into multiple rectangular potential barriers. By using the conduction band barrier height of 3.34 eV determined for the SiO2/Si(100) interfaces, a tunneling effective mass of 0.35m0 is obtained so as to reproduce the SiO2 thickness dependence on the direct tunnel current. The Fowler-Nordheim tunnel current oscillation due to interference between the propagating electron wave at the SiO2 conduction band and the wave reflected at the SiO2/Si interface has also been explained by employing an oxide conduction band effective mass of 0.60m0. It is found that the oxide thicknesses determined by ellipsometry are in good agreement with those extracted by fitting the measured tunnel current to theoretical one.

Comprehensive Study of V FB Shift in High-k CMOS - Dipole Formation, Fermi-level Pinning and Oxygen Vacancy Effect

We have quantitatively investigated effective work function (Phi_m,eff) shift, and experimentally demonstrated that high-k/SiO₂ dipole and Si-based gate/high-k contribution are critically important for understanding anomalous V_FB shift. Furthermore, we have also found that annealing of metal/high-k gate stack in the reduction ambient induces another dipole formation at the high-k/Si02 interface. Finally, by using the AI₂O₃ and Y₂O₃ layer as a bottom high-k, the symmetric V_TH CMOS is successfully achieved with a single metal gate electrode.

Performance Enhancement of Tunnel Field-Effect Transistors by Synthetic Electric Field Effect

In this letter, we propose a synthetic electric field (SE) effect to enhance the performance of tunnel field-effect transistors (TFETs). The novel SE-TFET architecture utilizes both horizontal and vertical electric fields induced by a gate electrode that is wrapped around an ultrathin epitaxial channel. The drain current of the SE-TFET is increased up to 100 times in comparison with those of conventional TFETs. The subthreshold slope of the SE-TFET also improved, and enhanced to 52 mV/decade by scaling the channel width and channel thickness.

Re-examination of Flat-Band Voltage Shift for High-k MOS Devices

We have systematically investigated the V_FB shift in the case of the stacked bi-layer high-k dielectrics with paying attention to the high-k/IL-SiO₂ interface. We demonstrate for the first time that V_FB shifts are determined predominantly by the high-k/IL-SiO₂ interface, while the gate/high-k interface plays little role.

Study of tunneling transport in Si-based tunnel field-effect transistors with ON current enhancement utilizing isoelectronic trap

The temperature dependence of the tunneling transport characteristics of Si diodes with an isoelectronic impurity has been investigated in order to clarify the mechanism of the ON-current enhancement in Si-based tunnel field-effect transistors (TFETs) utilizing an isoelectronic trap (IET). The Al–N complex impurity was utilized for IET formation. We observed three types of tunneling current components in the diodes: indirect band-to-band tunneling (BTBT), trap-assisted tunneling (TAT), and thermally inactive tunneling. The indirect BTBT and TAT current components can be distinguished with the plot described in this paper. The thermally inactive tunneling current probably originated from tunneling consisting of two paths: tunneling between the valence band and the IET trap and tunneling between the IET trap and the conduction band. The probability of thermally inactive tunneling with the Al–N IET state is higher than the others. Utilization of the thermally inactive tunneling current has a significant effe...

Unexpected equivalent-oxide-thickness dependence of the subthreshold swing in tunnel field-effect transistors

Tunnel field-effect transistors (TFETs) exhibiting a minimum subthreshold swing (SS) of 27 mV/decade were successfully fabricated using conventional planar HfO2/Si-gate-stack structures. However, an unexpected SS degradation with increasing equivalent oxide thickness (EOT) was observed compared with the simulated results obtained under the assumption of ideal band-to-band tunneling. We found that the poor subthreshold operation was governed by a thermally activated process, suggesting trap-assisted tunneling that occurs with traps near the metallurgical pn junction. Furthermore, we discuss the effect of the observed EOT-sensitive SS degradation on device production.

V FB Roll-off in HfO 2 Gate Stack after High Temperature Annealing Process - A Crucial Role of Out-diffused Oxygen from HfO 2 to Si

We report for the first time that VFB roll-off behavior observed in thinner EOT region for metal/HfO₂/SiO₂ stacks is directly related to re-oxidation at the bottom SiO₂/Si interface. Based on this understanding, we propose a possible solution for keeping high effective work-function (Phi_m,eff ) without VFB roll-off and demonstrate the obtained Phi_m,eff value of 4.9 eV mPt₃Si/HfO₂/SiO₂ stack.

Design and proof of high quality HfAlO/sub x/ film formation for MOSCAPs and nMOSFETs through Layer-by-Layer Deposition and Annealing process

We propose a new method for high-k film growth and demonstrate its usefulness in terms of improvements of electrical characteristics of MOSCAPs and nMOSFETs. Layer-by-Layer Deposition & Annealing (LL-D&A) is a key concept to reduce impurities incorporated in the film through decomposition of precursors. For HfAlO/sub X/ (Hf:75at.%), it is shown that there are big differences in physical and electrical properties between LL-D&A and conventional ALD+PDA. The maximum film thickness for annealing to effectively remove impurities and presumably to cure imperfections should be less than 1.8 nm. The excellent properties for EOT=1.38 nm HfAlO/sub X/ grown through D&A(O/sub 2/) process, such as a very small flatband voltage shift (/spl delta/V/sub FB/) less than 0.06 V for MOSCAP, a well controlled subthreshold swing of 77 mV/dec, a peak mobility of 210 cm/sup 2//Vs and 10-year lifetime at V/sub g/=-1.9 V for poly-Si gate nMOSFET, manifest the superiority of LL-D&A to the conventional ALD+PDA.