Yukinori Morita

Experimental evidence for the flatband voltage shift of high-k metal-oxide-semiconductor devices due to the dipole formation at the high-k∕SiO2 interface

We have examined an origin of the flatband voltage (VFB) shift in metal-oxide-semiconductor capacitors by employing bilayer high-k gate dielectrics consisting of HfO2 and Al2O3 on the interfacial SiO2 layer. We found that the high-k∕SiO2 interface affects the VFB shift through an electrical dipole layer formation at its interface, regardless of the gate electrode materials. Furthermore, we demonstrated that the VFB shift in the metal/high-k gate stack is determined only by the dipole at high-k∕SiO2 interface, while for the Si-based gate it is determined by both gate/high-k and high-k∕SiO2 interfaces.

Ge metal-insulator-semiconductor structures with Ge3N4 dielectrics by direct nitridation of Ge substrates

We have fabricated Ge metal-insulator-semiconductor structures with ultrathin pure germanium nitride (Ge3N4) films by the direct nitridation of germanium (Ge) substrates. The plasma-enhanced nitridation technique was used with dc plasma source at low temperatures. Capacitance–voltage characteristics with no hysteresis and capacitance equivalent thickness of 1.23 nm have been achieved.

Ideal hydrogen termination of Si(001) surface by wet‐chemical preparation

A nearly ideal Si(001) surface was prepared by a wet‐chemical method with a solution of HF:HCl=1:19 (pH<1). The surface was examined by scanning tunneling microscopy and was found to be covered by the uniform dihydride phase. Its successful preparation was the direct consequence of the following facts: The suppression of the (111) facet formation due to a low concentration of OH ions in the etchant solution and the stabilization of the surfaces structure due to the formation of the ordered steps.

Role of germanium nitride interfacial layers in HfO2/germanium nitride/germanium metal-insulator-semiconductor structures

The authors investigate the electrical properties of germanium nitride interfacial layers for germanium metal-insulator-semiconductor (Ge MIS) structures with HfO2 high-k dielectrics. A pure Ge nitride interfacial layer is fabricated by direct nitridation of a Ge substrate with the plasma processing before high-k deposition. The interface trap density of Au∕HfO2∕Ge niride/Ge MIS structures measured by the ac conductance method including the effect of the surface potential fluctuation is found to be as low as 1.8×1011cm−2eV−1 at the minimum. It is also found that Ge nitride interfacial layers mitigate the degradation of the accumulation capacitance during the high-temperature annealing.

Direct observation of SiH3 on a 1%‐HF‐treated Si(111) surface by scanning tunneling microscopy

Scanning tunneling microscopy (STM) has been made on an as‐prepared Si(111) surface by the 1%‐HF treatment. The STM images for both the empty and filled states exhibit regular dots with the threefold symmetry on the flat parts of the surface: the distance between dots measures 2.2 A. The origin of these dots can be ascribed to the H atoms of the trihydride (SiH3) phase on the Si(111) surface. The electrons can tunnel from or to the tail states of the σ (filled) states or the σ* (empty) states around the H atoms for the SiH3 radicals, respectively.

Pure germanium nitride formation by atomic nitrogen radicals for application to Ge metal-insulator-semiconductor structures

We have investigated the nitridation of germanium using atomic nitrogen radicals generated by a remote rf plasma source. Pure amorphous Ge3N4 films without oxygen are obtained by the direct nitridation of clean Ge substrates. The conformal growth with smooth surface and sharp interface can be achieved in the Ge3N4 films grown at 100°C, where the maximum thickness of the Ge3N4 films is approximately 3nm. While the surfaces of the Ge3N4 films are partially oxidized by the exposure to air, the Ge3N4 films exhibit the high resistance against oxygen diffusion. The Ge3N4 films are water insoluble and soluble in HF. These results demonstrate that pure direct nitridation of Ge substrates has a possibility to be used not only as a passivation layer but also as a diffusion barrier layer against oxygen for Ge metal-insulator-semiconductor field effect transistor applications.

Atomic scale flattening and hydrogen termination of the Si(001) surface by wet-chemical treatment

An ultrahigh vacuum scanning tunneling microscopy has been applied to analyze wet‐chemically prepared Si(001) surfaces in an atomic scale. The surface treated by 2.5% HF is atomically rough and is covered by featureless corrugations resulting from an etching by OH ions in the solution. The surface treated by HF:HCl=1:19 mixed solution without controlling an oxide‐removal direction is also atomically rough, but is characterized by a kinkful morphology, which reflects the crystallographic nature of the Si(001) surface. On the other hand, the surface treated by the same mixed solution but by controlling the oxide‐removal direction is covered by regular monatomic steps and the ordered dihydride phase on the terrace. From these facts, we have confirmed that these factors, the concentration of the OH ions and the way of the oxide‐removal, play roles in the preparation of the atomically flat Si(001) surface.

Molecular arrangement of copper phthalocyanine on hydrogen‐terminated Si(111): Influence of surface roughness

The molecular arrangement of copper phthalocyanine (CuPc) crystals on hydrogen‐terminated Si(111) surfaces was investigated by using both scanning probe microscopy and x‐ray diffraction in terms of influence of the surface roughness. On a rough surface with a root‐mean‐square roughness of 0.20 nm, the molecules were stacked so as to form an α crystal where the molecular column was parallel to the surface. On the other hand, a new crystal form with its column exactly perpendicular to the Si(111) plane was grown on a atomically flat surface. In this case, the molecules were stacked perpendicular to the substrate with the underlying molecules situated directly below. These molecular arrangements were independent of the growth temperature in the range of 60–180 °C. On the atomically flat surfaces, the strong interactive force between the surface and the planar CuPc molecule may result in the new growth behavior.

Electrical performances of junctionless-FETs at the scaling limit (L CH = 3 nm)

Junctionless-FETs (JL-FET) with extremely short channel length (LCH = 3 nm) were fabricated using anisotropic wet etching of SOI substrate, and superior transfer characteristics are demonstrated. Experimental results and simulation study predict that ultra-low voltage CMOS can be constructed using N- and P-type JL-FETs with single work function metal gate. Furthermore, it is cleared that carrier velocity in the short channel JL-FET is approaching to the injection velocity.

Performance Enhancement of Tunnel Field-Effect Transistors by Synthetic Electric Field Effect

In this letter, we propose a synthetic electric field (SE) effect to enhance the performance of tunnel field-effect transistors (TFETs). The novel SE-TFET architecture utilizes both horizontal and vertical electric fields induced by a gate electrode that is wrapped around an ultrathin epitaxial channel. The drain current of the SE-TFET is increased up to 100 times in comparison with those of conventional TFETs. The subthreshold slope of the SE-TFET also improved, and enhanced to 52 mV/decade by scaling the channel width and channel thickness.