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Dive into the research topics where Wolfgang Aderhold is active.

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Featured researches published by Wolfgang Aderhold.


IEEE Electron Device Letters | 2016

Low-Resistance Titanium Contacts and Thermally Unstable Nickel Germanide Contacts on p-Type Germanium

Hao Yu; Marc Schaekers; Tom Schram; Wolfgang Aderhold; Abhilash J. Mayur; Jerome Mitard; Liesbeth Witters; K. Barla; Nadine Collaert; Naoto Horiguchi; Aaron Thean; Kristin De Meyer

Ti/p-Ge and NiGe/p-Ge contacts are compared on both planar and fin-based devices. Ti/p-Ge contacts show low contact resistance, while NiGe/p-Ge devices show short circuit problems due to thermally driven Ni diffusion. Considering the thermal budget in the standard backend of line processing for CMOS, Ti is more suitable for p-Ge devices. A low Ti/p-Ge contact resistivity of 1.1 × 10-8 Ω · cm2 is achieved by using a multi-pulse laser annealing technique for B activation.


symposium on vlsi technology | 2016

Ultralow-resistivity CMOS contact scheme with pre-contact amorphization plus Ti (germano-)silicidation

H.Y. Yu; Marc Schaekers; Andriy Hikavyy; Erik Rosseel; A. Peter; Kelly E Hollar; Fareen Adeni Khaja; Wolfgang Aderhold; L. Date; Abhilash J. Mayur; J.G. Lee; K. Shin; Bastien Douhard; Soon Aik Chew; Steven Demuynck; S. Kubicek; D. H. Kim; Anda Mocuta; K. Barla; Naoto Horiguchi; Nadine Collaert; Aaron Thean; K. De Meyer

Following the previous study on Si:P [1], we also achieve ultralow contact resistivities (ρ<sub>c</sub>) of ~2×10<sup>-9</sup> Ω·cm<sup>2</sup> on Si<sub>0.3</sub>Ge<sub>0.7</sub>:B using the same Ti based pre-contact amorphization (PCAI) plus post-metal anneal (PMA) technique. Similar as on Si:P, low-energy PCAI provides the lowest ρ<sub>c</sub> on SiGe:B. By increasing the B concentration, the PMA temperature required on SiGe:B also matches with that on Si:P. A simple Ti based CMOS contact flow is thus proposed. Several B doping and activation methods on SiGe:B are also compared in this work.


advanced semiconductor manufacturing conference | 2008

Use of Virtual Metrology for in-situ Visualization of Thermal Uniformity and Handoff Adjustment in RTP Critical Anneals

Victor Vitale; Wolfgang Aderhold; Aaron Muir Hunter; Ilias Iliopoulos; Natalia Kroupnova; Aleksey Yanovich; Nir Merry

Applied materials rapid thermal processing (RTP) systems are unique in providing high resolution process data particularly wafer rotation angle and wafer rotation speed as a function of time. This work explores how this information can be used to predict on-wafer process results using an advanced analysis package known as WISR (wafer interdiction and scrap reduction). WISR is an advanced process control platform for the collection, storage, visualization, and analysis of process parameters from production tools. One of the main analysis features of WISR is the ability to create virtual sensors. Virtual sensors are calculated parameters derived from physical sensors that can provide real-time and statistical representation of process health. The focus of this paper is the ability of WISR to transform time series chamber parameters from the pyrometers and the magnetic levitation controller into thermal wafer images at any time during the recipe execution and provide wafer-to-wafer handoff correction. These abilities constitute a virtual sensor module in WISR known as Virtual metrology (VM). We describe the implementation of the VM-analysis and show how temperature maps and handoff corrections correlate with offline metrology in RTP critical anneals. This is an innovative new method to significantly reduce wafer processing errors, enhance yield, and minimize production cost.


international conference on advanced thermal processing of semiconductors | 2007

Virtual Metrology in RTP with WISR

Wolfgang Aderhold; Ilias Iliopoulos; Aaron Muir Hunter

The Applied Materials RTP systems are unique in providing high resolution process data particularly lamp power and temperature as a function of radial position and time. This work explores how these data can be exploited to predict on-wafer process results using an SPC analysis package named WISR. WISR is an advanced process control platform for collection, storage, visualization, and analysis of data from process tools. The product is collecting data at rates up to 100Hz. It has the ability of notification and interdiction if data goes outside of specification. One of its main features is the ability to create virtual sensors. These are parameters that are derived from physical sensors and provide a statistical representation of the process health. The focus of this paper is the ability of WISR to transform the time series chamber data from the pyrometers into thermal wafer images at any time window during the recipe execution. We describe the data analysis that was deployed, and show how temperature maps generated correlate with metrology data from RTP processes. This is a disruptive new method to significantly save monitor wafer cost, enhance yield and prevent wafer processing errors.


ION IMPLANTATION TECHNOLOGY: 17th International Conference on Ion Implantation#N#Technology | 2008

Photon Influence on P and B Diffusion

Wolfgang Aderhold; Aaron Muir Hunter; S. B. Felch; Joseph M. Ranish

We investigate photon effects for two thermal processes: implanted dopant activation and diffusion; and silicon oxidation. Because the Applied Materials Radiance Plus RTP system heats only one side of the wafer with lamps, the thermal and photon effects are separable by changing the side of the wafer that is irradiated. The difference in process results can then be interpreted in respect to the spectral difference of the lamp radiation and the grey body radiation emitted by the hot wafer. No significant effect due to the presence of high energy photons in either process was observed.


symposium on vlsi technology | 2017

Sub-10 −9 Ω·cm 2 contact resistivity on p-SiGe achieved by Ga doping and nanosecond laser activation

J.-L. Everaert; Marc Schaekers; H.Y. Yu; L.-L. Wang; Andriy Hikavyy; L. Date; J. del Agua Borniquel; Kelly E Hollar; Fareen Adeni Khaja; Wolfgang Aderhold; Abhilash J. Mayur; J. Y. Lee; H. van Meer; Yu-Long Jiang; K. De Meyer; D. Mocuta; Naoto Horiguchi

We report record breaking values for PMOS source drain (S/D) contact resistivity, ρ<inf>c</inf> < 10<sup>−9</sup>Ω·cm<sup>2</sup>. These were obtained by shallow Ga ion implantation on Si<inf>0.4</inf>Ge<inf>0.6</inf> in combination with subsequent pulsed nanosecond laser anneal (NLA). Cross section transmission electron microscopy (XTEM) shows the pc reduction mechanism is based on Ga and Ge segregation towards the surface.


Archive | 2000

Thermally processing a substrate

Ryan C. Boas; Ajit Balakrishna; Benjamin Bierman; Brian Haas; Dean Jennings; Wolfgang Aderhold


Archive | 2008

Backside rapid thermal processing of patterned wafers

Wolfgang Aderhold; Sundar Ramamurthy; Aaron Muir Hunter


Archive | 2005

Method and system for deposition tuning in an epitaxial film growth apparatus

Wolfgang Aderhold; Ali Zojaji


Archive | 2009

System for non radial temperature control for rotating substrates

Wolfgang Aderhold; Aaron Muir Hunter; Joseph M. Ranish

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Marc Schaekers

Katholieke Universiteit Leuven

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