Won-joo Kim
Samsung
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Publication
Featured researches published by Won-joo Kim.
international solid-state circuits conference | 2012
Won-joo Kim; Wang Yibing; Ilia Ovsiannikov; Seung-Hoon Lee; Yoon-dong Park; Chilhee Chung; Eric R. Fossum
A 1.5Mpixel RGBZ image sensor that simultaneously captures color (RGB) and time-of-flight (ToF) range (Z) images is presented. While ToF sensors are well documented, few, if any, monolithic sensors have been reported that capture both range and color. In one sensor, a combined pixel structure captures color and range, but presumably in sequential fields. This approach does not allow simultaneous capturing of range with color, and the pixel performance cannot be optimized for each mode. In thie paper, we introduce a sensor that is designed to capture color and range simultaneously with individually optimized pixels.
symposium on vlsi technology | 2006
Suk-pil Kim; Won-joo Kim; Jae-woong Hyun; Sung-jae Byun; Junemp Koo; Jung-Hoon Lee; Kyoung-lae Cho; Seong-taek Lim; Jong-Bong Park; In-kyeong Yoo; Choong-ho Lee; Donggun Park; Yoon-dong Park
A new type of memory, paired FinFET charge trap memory is reported. It consists of two split silicon fins and insulator between them. Two channels are formed on the outer surface of silicon so doubled integration density can be achieved. We successfully fabricated paired FinFET SONOS devices. It shows good program and erase characteristics. Independent programming on each storage nodes is demonstrated. The circuit configuration for NAND flash application is also proposed
ieee silicon nanoelectronics workshop | 2010
Sang Wan Kim; Garam Kim; Won-joo Kim; Hyoung-soo Ko; Byung-Gook Park
In this paper, a capacitor-less 1T DRAM cell transistor with non-overlap structure and recessed channel is presented. Because of the non-overlap structure between gate and source/drain, GIDL (Gate Induced Drain Leakage) current is efficiently suppressed at hold condition. This results in more than 1 s retention time at 25 °C and 100 ms at 85 °C
symposium on vlsi technology | 2008
June-mo Koo; Tae-eung Yoon; Tae-Hee Lee; Sung-jae Byun; Young-Gu Jin; Won-joo Kim; Suk-pil Kim; Jong-Bong Park; Jun-Seok Cho; Jeong-Dong Choe; Choong-ho Lee; Jong Jin Lee; Je-Woo Han; Y. M. Kang; Sangjun Park; Byoung-Ho Kwon; Yong-Ju Jung; Inkyoung Yoo; Yoon-dong Park
Multi-bit vertical structure NAND (VsNAND) flash memories with 32-paired FinFET cell string have been successfully integrated for the first time. Its array integration issues regarding the sub-10 nm vertical structure fin could be solved by proper choices of isolation material, ion implantation, and word line patterning. VsNAND flash array cells with TANOS (TaN/Al2O3/SiN/SiOx/Si) charge trap structure show possibilities of acceptable program/erase properties and cell Vth distribution characteristics for multi-level NAND flash application.
international electron devices meeting | 2011
Tae-Yon Lee; Y. J. Lee; Dong-Ki Min; S.H. Lee; Won-joo Kim; Sung Hwan Kim; Jongwan Jung; Ilia Ovsiannikov; You-Seung Jin; Young-soo Park; Eric R. Fossum; Chilhee Chung
A single-tap concentric photogate pixel of 28 µm pitch is developed for application to time-of-flight (ToF) three dimension (3D) image sensors. The 198×108 ToF pixel array exhibits demodulation contrast higher than 50% and distance error less than 1%, over 1 to 7 m range using 20MHz modulation of 850 nm light emitting diode (LED) illumination.
symposium on vlsi technology | 2006
Won-joo Kim; Sang-Moo Choi; Junghun Sung; Tae-Hee Lee; Chul-min Park; Hyoung-soo Ko; Ju-Hwan Jung; Inkyong Yoo; Yoon-dong Park
Archive | 2008
Suk-pil Kim; Yoon-dong Park; Deok-kee Kim; Won-joo Kim; Young-Gu Jin; Seung-Hoon Lee
Archive | 2008
Young-Gu Jin; Yoon-dong Park; Won-joo Kim; Seung-Hoon Lee; Suk-pil Kim
Archive | 2008
Young-Gu Jin; Yoon-dong Park; Won-joo Kim; Seung-Hoon Lee; In-sung Joe
Archive | 2007
Suk-pil Kim; Yoon-dong Park; Won-joo Kim