Jae-woong Hyun

Program/Erase Characteristics of Amorphous Gallium Indium Zinc Oxide Nonvolatile Memory

Currently, both high-density 3-D stacking nonvolatile (NV) memory and embedded NV memory in advanced systems on panel (SOPs) urgently demand the assistance of new and functional transition metal-oxide materials. This is to overcome serious fabrication issues encountered in the use of conventional Si or poly-crystalline Si materials, as well as to increase storage density with lower process cost. This paper reports the fully functional NV memory structure operated by an ionic amorphous oxide semiconductor with a wide energy band gap (> 3.0 eV) in a Ga2O3-In2O3-ZnO (GIZO) system under low process temperature (< 400degC) while being combined with various metal-oxide materials of Al2O3, GIZO, and Al2O3 as the electron charges tunneling, storage, and blocking layers, respectively. The different methods of memory programs and, especially, the unique erase characteristics caused by a much wider band gap than Si were intensively being investigated, and as a result, excellent electrical results of a large program/erase window over 3.8 V at a pulse time of 10 ms are achieved.

Paired FinFET Charge Trap Flash Memory for Vertical High Density Storage

A new type of memory, paired FinFET charge trap memory is reported. It consists of two split silicon fins and insulator between them. Two channels are formed on the outer surface of silicon so doubled integration density can be achieved. We successfully fabricated paired FinFET SONOS devices. It shows good program and erase characteristics. Independent programming on each storage nodes is demonstrated. The circuit configuration for NAND flash application is also proposed

Adsorption-induced conversion of the carbon nanotube field effect transistor from ambipolar to unipolar behavior

We investigate ambipolar to unipolar transition by the effect of ambient air on the carbon nanotube field-effect transistor. A unipolar transport property of the double-walled nanotube field-effect transistor and its conversion from ambipolar behavior are observed. We suggest that adsorptions of oxygen molecules, whose lowest-unoccupied-molecular-orbital state is around the midgap of the carbon nanotube, could suppress the electron channel formation and, consequently, result in the unipolar transport behavior.

Ambient air effects on electrical characteristics of GaP nanowire transistors

Gallium phosphide (GaP) nanowire transistors were fabricated in back-gated structure, and their electrical characteristics were measured systematically in both air and vacuum. The transistors turn on typically between −5 and −7V in ambient air. However, a large threshold voltage (Vth) shift, ∼10V, toward negative gate bias was observed in vacuum. After the transistors were exposed to air for 48h, Vth returned to the similar value in ambient air, implying a reversible process. The rate of Vth shift slows down when they were exposed to N2 in comparison with that of air. The shift of Vth is believed to be related to the charge transfer from the surface of GaP nanowire to the physically adsorbed OH or oxygen. In addition, the observed Vth shift from the GaP nanowire transistors can be explained by the conventional n-channel depletion mode metal-oxide-semiconductor field-effect transistor.

Data retention behavior in the embedded SONOS nonvolatile memory cell

In this paper, data retention loss phenomena after write/erase cycles and time in an embedded SONOS memory cell were investigated for the first time. By analyzing source junction leakage current, it was determined that the loss of holes in nitride also results in an increase in threshold voltage, a drop in ion, and a degradation of sub-threshold slope

Retention Mechanism of Localized Silicon–Oxide–Nitride–Oxide–Silicon Embedded NOR Device

Reliability studies of localized oxide–nitride–oxide memory (LONOM) devices are presented. The observed reduction in channel threshold voltage as a result of the retention charge loss of a programmed cell is demonstrated in terms of vertical leakage paths. Despite the apparent controversy of charge transport with nitride read-only memory (NROM) devices, the vertical paths are evidently observed via the channel and junction threshold voltage changes, which were monitored using Ids–Vds curves and gate-induced drain leakage (GIDL) measurements, visualizing the internal status of interface charges and stored charges in a nitride layer.