Woopoung Kim

Design of inductors in organic substrates for 1-3 GHz wireless applications

High Q inductors with maximum quality factors in the range of 180-60 have been obtained at frequencies in the 1-3 GHz band for inductances in the range of 1 nH to 20 nH using a low-temperature organic laminate build-up process. This is the first time such high Q inductors have been demonstrated in this technology. The different inductor designs, optimization schemes, and trade-offs between different topologies, have been discussed in this paper.

Design of embedded high Q-inductors in MCM-L technology

Although discrete surface mount passive components (resistors, capacitors and inductors) have been popular in mixed signal designs, the development of integrated passive components suitable for integration with printed wiring boards is relatively recent. This integration is imperative since in some mixed signal designs, off-chip passive components take up more real estate on the boards than the analog and digital signal processing units. This paper shows the possibility of fabricating a large number of MCMs with high wiring density and integrated passives using standard PWB technology. However, the presence of inherent lossy materials in standard PWB technology reduces the Q factor of embedded passives in the more traditional components such as spiral inductors. In this paper, the embedded passives were modeled using coupled line parameters obtained using quasi-TEM approximations. This modeling approach provides advantages and greater insight over the more traditional methods for modeling embedded passives. Based on this modeling approach, a systematic method to improve the quality (Q) factors of the integrated inductors is also presented based on a layout optimization scheme. By departing from the traditional spiral inductors, a max Q-factor of 103 was obtained for an 11 nH inductor at 2.2 GHz with a resonant frequency of 3.6 GHz. Several other inductors have been obtained with Q-factors ranging from 23-38 for inductors ranging from 28 nH to 20 nH respectively. The authors believe that this is the first paper showing such high Q-factors for embedded passives in organic technology.

High performance spiral inductors embedded on organic substrates for SOP applications

This paper presents the design, measured data, and systematic analysis of spiral embedded inductors fabricated on standard organic substrates using low-cost, large-area MCM-L technology. Several configurations for inductors were investigated to optimize the inductor layout dimensions such as conductor width, number of turns, inner diameter, spacing between inductor and ground, and inductor area. A maximum Q of 100 was measured for a 3.6 nH inductor at 1.8 GHz on an organic substrate with a self resonance frequency of 10.6 GHz within an inductor core area of 0.72 mm/sup 2/. The effects of configurational variables on inductor characteristics such as quality factor, self-resonance frequency, and inductance are discussed. High-Q inductors embedded on organic substrates can find numerous RF and microwave system-on-package (SOP) applications, such as VCOs, IF/RF bandpass filters, LNAs, etc., in which IC chips are flip-chip mounted on the package substrate.

Suppression of coupled-slotline mode on CPW using air-bridges measured by picosecond photoconductive sampling

For the first time, the effect of air-bridges on the suppression of the unwanted coupled-slotline (CSL) mode on a coplanar waveguide (CPW) is experimentally observed up to 250-GHz bandwidth, based on the picosecond photoconductive sampling technique. The CSL mode is initially originated from the asymmetric pulse generation on the CPW using ultrashort laser pulses and photoconductive switches. We find that more than two crossover air-bridges are needed to remove the unwanted CSL modes. The parasitic capacitance for the crossover air-bridge over the CPW and the parasitic inductance for the ground connecting air-bridge along the CPW are crucial in determining the signal distortion.

Capturing via effects in simultaneous switching noise simulation

This paper presents a method for including via effects in modeling simultaneous switching noise (SSN). Models for interconnections and multi-layered planes have been developed and combined using superposition based on skin depth approximation to capture the return current effect due to via transitions. Measurements on active board containing the drivers, transmission lines, vias and planes have been conducted. The modeling approach has been correlated with measurements, showing the validity of the method. The modeling method has been extended and applied to large size systems to model the power supply fluctuations due to via transitions.

Validity of non-physical RLGC models for simulating lossy transmission lines

A non-physical RLGC model for transmission lines is developed through the propagating wave behavior analysis. The non-physical RLGC model is different from the conventional RLGC model with physical RLGC values in the sense that it uses non-physical parameters. The parameters of the non-physical RLGC model are made up of frequency-dependent characteristic impedances and propagation constants. A lossy transmission line is simulated using the non-physical RLGC model. This has been compared with the transmission line equation (quasi-TEM assumption) and TDR measurements, which show good agreement.

Determination of propagation constants of transmission lines using 1-port TDR measurements

The propagation constants of transmission lines were measured from 1-port TDR measurements. Since the TDR measurement is a 1-port measurement, error can be smaller than 2-port measurement techniques. Moreover, the available frequency is determined by the rise time of the TDR step pulse unlike TRL methods. The propagation constant of a lossy transmission line was extracted from DC to 10 GHz. Simulation of the lossy transmission line using the extracted propagation constant shows good agreement with TDR measurement, demonstrating the accuracy of the TDR measurement technique.

Electrical design of wafer level package on board for gigabit data transmission

This paper discusses the design of a wafer level package on board for 5GHz data transmission. The design is based on the 2005 node of the International Technology Roadmap on Semiconductors (ITRS) that predicts a clock frequency of 5GHz, power of 170W and an operating voltage of 0.9V for high-end microprocessors. The goal of this paper is to demonstrate the ability to support global interconnections on the board at a speed comparable to the clock frequency and supply adequate power to the chip. This requires careful design of the topology of the interconnections, control of the eddy current losses in Silicon, control of the conductor and dielectric losses in the board and design of the transition between the chip and the board. The electrical design process is discussed in detail using a test vehicle, in this paper. The test vehicle consists of Co-planar waveguide (CPW) lines on high resistivity Silicon Substrate connected to CPW lines on low k, low loss board. The transition between the chip and board is completed through solder bumps with 50 /spl mu/m diameter and 100 /spl mu/m pitch. Both the Silicon and Board transmission lines have been characterized using TDR measurements. In addition, the inductance of the solder bumps have been extracted. Using synthesized models extracted from measurements, the eye diagrams for 5GHz data transmission has been simulated to show the importance of losses for 1mm long Silicon lines connected to 5cm long board lines through low inductance solder bumps. In addition, the effect of underfill and curing on signal propagation have been quantified.

Extraction of the frequency-dependent characteristic impedance of transmission lines using TDR measurements

This paper discusses a method for measuring the frequency-dependent characteristic impedance of transmission lines using time domain reflectometry (TDR) measurements with an open, short and load calibration. Conventional characterization methods using a network analyzer require precise information on the structure of the transmission line to extract the characteristic impedance, which can be cumbersome. In TDR measurements, the effect of the load can be removed using time windowing, which can reduce the error in the measurements. The results of TDR measurements have been compared with those of a network analyzer to quantify the measurement error. Both a low pass filter and a PCB microstrip line have been characterized using this method.

Electromagnetic modeling and hardware measurements of simultaneous switching noise in high speed systems

This paper discusses the modeling of simultaneous switching noise in high speed systems. Various methods have been presented and the accuracy of these methods has been verified through measurements in both the frequency and time domain. These measurements include experimental test vehicles and functional products.