Sidharth Dalmia

Design of integrated low noise amplifiers (LNA) using embedded passives in organic substrates

The noise figure of a low noise amplifier (LNA) is a function of the quality factor of its inductors. The lack of high-Q inductors in silicon has prevented the development of completely integrated complementary metal oxide semiconductor (CMOS) LNAs for high sensitivity applications like global system for mobile communications (GSM) (1.9 GHz) and wideband code-division multiple-access (W-CDMA) (2.1GHz). Recent developments in the design of high-Q inductors (embedded in low cost integrated circuit (IC) packages) have made single-package integration of RF front-ends feasible. These embedded passives provide a viable alternative to using discrete elements or low-Q on-chip passives, for achieving completely integrated solutions. Compared to on-chip inductors with low Q values and discrete passives with fixed Q/sub s/, the use of these embedded passives also leads to the development of the passive Q as a new variable in circuit design. However, higher Q values also result in new tradeoffs, particularly with respect to device size. This paper presents a novel optimization strategy for the design of completely integrated CMOS LNAs using embedded passives. The tradeoff of higher inductor size for higher Q has been adopted into the LNA design methodology. The paper also presents design issues involved in the use of multiple embedded components in the packaging substrate, particularly with reference to mutual coupling between the passives and reference ground layout.

Design of inductors in organic substrates for 1-3 GHz wireless applications

High Q inductors with maximum quality factors in the range of 180-60 have been obtained at frequencies in the 1-3 GHz band for inductances in the range of 1 nH to 20 nH using a low-temperature organic laminate build-up process. This is the first time such high Q inductors have been demonstrated in this technology. The different inductor designs, optimization schemes, and trade-offs between different topologies, have been discussed in this paper.

Layout-level synthesis of RF inductors and filters in LCP substrates for Wi-Fi applications

A fast and accurate layout-level synthesis and optimization technique for embedded passive RF components and circuits such as inductors and bandpass filters have been presented. The filters are composed of embedded inductors and capacitors in a multilayer liquid crystalline polymer substrate. The proposed approach is based on a combination of segmented lumped-circuit modeling, nonlinear mapping using polynomial functions, artificial neural network-based methods, and circuit-level optimization. Synthesis and optimization results of inductors for spiral/loop designs based on microstrip and stripline configuration are within 5% of data obtained from electromagnetic (EM) simulations. For RF circuits, the methodology has been verified through synthesis of 2.4- and 5.5-GHz bandpass filters with and without transmission zeros. Scalability has been shown over a range of 2-3 and 4-6 GHz, respectively, with bandwidth variation of 0.5%-3% of center frequency. The synthesized models are within 3%-5% of EM simulation data.

Liquid crystalline polymer (LCP) based lumped-element bandpass filters for multiple wireless applications

This paper presents for the first time the design, implementation, measurements and reliability data of multiple RF filters on liquid crystalline polymer based substrates for different communication standards such as 802.11 a/b/g, LMDS/MMDS, cellular and Bluetooth applications. The first examples of this platform substrate technology are very compact 12 mm/sup 3/ fully packaged SMT front-end filters with center frequencies of 2.45 and 5.775 GHz. One embodiment of the filter at 2.45 GHz, which is well suited for 802.11 b/g and Bluetooth type applications, provides a passband of 100 MHz with maximum inband insertion loss less than 2 dB at 25 /spl deg/C, greater than 25 dB attenuation at 2700-2800 MHz, greater than 10 dB attenuation below 2.2 GHz, greater than 20 dB rejection at the seconds and third harmonic and inband VSWR less than 1.5 matched to 50 ohms at the input and output.

Design of embedded high Q-inductors in MCM-L technology

Although discrete surface mount passive components (resistors, capacitors and inductors) have been popular in mixed signal designs, the development of integrated passive components suitable for integration with printed wiring boards is relatively recent. This integration is imperative since in some mixed signal designs, off-chip passive components take up more real estate on the boards than the analog and digital signal processing units. This paper shows the possibility of fabricating a large number of MCMs with high wiring density and integrated passives using standard PWB technology. However, the presence of inherent lossy materials in standard PWB technology reduces the Q factor of embedded passives in the more traditional components such as spiral inductors. In this paper, the embedded passives were modeled using coupled line parameters obtained using quasi-TEM approximations. This modeling approach provides advantages and greater insight over the more traditional methods for modeling embedded passives. Based on this modeling approach, a systematic method to improve the quality (Q) factors of the integrated inductors is also presented based on a layout optimization scheme. By departing from the traditional spiral inductors, a max Q-factor of 103 was obtained for an 11 nH inductor at 2.2 GHz with a resonant frequency of 3.6 GHz. Several other inductors have been obtained with Q-factors ranging from 23-38 for inductors ranging from 28 nH to 20 nH respectively. The authors believe that this is the first paper showing such high Q-factors for embedded passives in organic technology.

Liquid crystalline polymer based RF/wireless components for multi-band applications

This paper presents for the first time the design, implementation, measurements, reliability data and integration of multiple RF components such as filters, baluns, diplexers, and a combination of the above on liquid crystalline polymer (LCP) based substrates for communication standards such as 802.11 a/b/g, LMDS/MMDS, satellite/digital TV, UWB, cellular and Bluetooth type applications. These components and process technologies are being targeted as a cost-effective high-performance, miniaturized alternative to the primary technologies of choice for multi-band RF/wireless applications, namely, low-temperature co-fired ceramic (LTCC), multi-layer ceramic (MLC) and ceramic monoblock technologies. The first examples of this platform substrate technology are very compact 12 mm/sup 3/ fully packaged SMT front-end filters with center frequencies of 2.45, 5.25 and 5.775 GHz. One embodiment of the filter at 2.45 GHz, which is well suited for 802.11 b/g and Bluetooth type applications, provides a passband of 100 MHz with maximum inband insertion loss less than 1.7 dB at 25/spl deg/C, greater than 25 dB attenuation at 2700-2800 MHz, greater than 10 dB attenuation below 2.2 GHz, greater than 20 dB rejection at the second and third harmonic and inband VSWR less than 1.5 matched to 50 ohms at the input and output.

High performance spiral inductors embedded on organic substrates for SOP applications

This paper presents the design, measured data, and systematic analysis of spiral embedded inductors fabricated on standard organic substrates using low-cost, large-area MCM-L technology. Several configurations for inductors were investigated to optimize the inductor layout dimensions such as conductor width, number of turns, inner diameter, spacing between inductor and ground, and inductor area. A maximum Q of 100 was measured for a 3.6 nH inductor at 1.8 GHz on an organic substrate with a self resonance frequency of 10.6 GHz within an inductor core area of 0.72 mm/sup 2/. The effects of configurational variables on inductor characteristics such as quality factor, self-resonance frequency, and inductance are discussed. High-Q inductors embedded on organic substrates can find numerous RF and microwave system-on-package (SOP) applications, such as VCOs, IF/RF bandpass filters, LNAs, etc., in which IC chips are flip-chip mounted on the package substrate.

Design and optimization of high Q RF passives on SOP-based organic substrates

Integration of passive devices such as inductors and capacitors in packages or on silicon is an important step towards miniaturization and reduction of cost. These passive devices are used as stand-alone components or form an integral part of filters, oscillators, amplifiers, mixers and other RF circuits. This paper discusses the design of high Q inductors and high Q capacitors in organic substrates. Inductors with maximum quality factors in the range of 60-180 were obtained at frequencies in the 1-3 GHz band for inductances in the range of 1 nH-20 nH. This is the first demonstration of such high Q inductors in organic substrates processed using low-temperature (<200/spl deg/C) processes. The dimensions of all inductors are comparable to a low temperature co-fired ceramic (LTCC, <900/spl deg/C) and multichip module deposition (400/spl deg/C<MCM-D<500/spl deg/C) technology process and well suited for integration in a variety of applications. The paper also discusses the performance of embedded capacitors in organic substrates. Although the Q factors for the capacitors in organic technologies are comparable to ceramic technologies, they do not compare well with the performance of inductors. The results for embedded capacitors show the need for lower loss materials compared to those currently used in low-temperature organic passive technology.

Digital and RF integration in system-on-a-package (SOP)

The Packaging Research Center (PRC) is developing system-on-a-package (SOP) technology, as a complimentary alternative to SOC, as the fundamental building block for next generation convergent systems with computing, telecom and consumer capabilities with data and voice. Any systems of this nature have to provide not only high-speed digital, but also high bandwidth optical, analog, RF and perhaps MEMS functions. The SOP technology being pursued at PRC with embedded digital, optical and RF functions addresses this need, optimizing the IC and the package for functions, performance, cost, size and reliability. The PRC is developing this complimentary alternative to SOC using a three tier strategy consisting of fundamental research innovations, enabling technology developments and system-level testbeds. Individual digital, optical and RF testbeds have been developed to enable the integration of novel packaging technologies like embedded passive and optical components, high density global interconnections and wafer level flip-chip assembly. A phased system testbed is being evolved from these three testbeds to develop new SOP convergent system platforms for a digital/optical/RF system implementation. This paper summarizes the latest PRC accomplishments in the development of SOP baseline processes and system testbeds and updates the progress from basic research and technology integration to system testbeds for SOP.

Capturing via effects in simultaneous switching noise simulation

This paper presents a method for including via effects in modeling simultaneous switching noise (SSN). Models for interconnections and multi-layered planes have been developed and combined using superposition based on skin depth approximation to capture the return current effect due to via transitions. Measurements on active board containing the drivers, transmission lines, vias and planes have been conducted. The modeling approach has been correlated with measurements, showing the validity of the method. The modeling method has been extended and applied to large size systems to model the power supply fluctuations due to via transitions.