Xiuyu Cai

Finfets having strained channels, and methods of fabricating finfets having strained channels

Multi-channel gate-all-around FET

METHOD OF FORMING A REDUCED RESISTANCE FIN STRUCTURE

HIGH-RELIABILITY, LOW-RESISTANCE CONTACTS FOR NANOSCALE TRANSISTORS

LDMOS FinFET device using a long channel region and method of manufacture

METHOD FOR MAKING SEMICONDUCTOR DEVICE WITH ISOLATION PILLARS BETWEEN ADJACENT SEMICONDUCTOR FINS

METHOD FOR CONTROLLING HEIGHT OF A FIN STRUCTURE

HETERO-CHANNEL FINFET

FinFETs and techniques for controlling source and drain junction profiles in finFETs

SERIES RESISTANCE REDUCTION IN VERTICALLY STACKED SILICON NANOWIRE TRANSISTORS