Yasuhiro Yoshiura

RFC diode with high avalanche stability and UIS capability

In this paper, we propose a novel backside design for Relaxed Field of Cathode (RFC) diode which realizes high avalanche stability and Undamped Inductive Switching (UIS) capability. In the case of the conventional RFC diode, wide recovery SOA is realized by forming p-layer on the backside of the edge termination area which reduces the carrier concentration at on-state and suppresses the carrier concentration on the boundary region during recovery. On the other hand, the avalanche stability at off-state of the conventional RFC diode is degraded comparing to pin diode. The failure analysis and numerical simulation taught that the avalanche stability degradation is caused by the secondary breakdown of the vertical parasitic pnp-transistor structure at the anode end. To suppress the effect of the parasitic pnp-transistor, an layer with well-adjusted width (Wn) is placed precisely under the edge of the anode area on the cathode side as the carrier sink for the electron. As a result, the new RFC diode with novel backside design obtains high avalanche stability and UIS capability without negative impact on total losses, snap-off capability and recovery SOA.

Simple simulation approach for the first trigger step of SEB (single event burn-out) based upon physical analysis for Si high voltage bipolar device

Through the physical analysis, the first and minimum destruction point of the power semiconductor chip is precisely identified as around the main pn junction. It well agrees with the Impact Ionization (I/I) peak enhanced by an electric field crowding. A simple device simulation approach, which uses a visible light approximation (optical generation) instead of a high energy radiation ion, is effective to trace the SEB phenomenon. Several fundamental settings were studied to simulate the experimental results.