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Proceedings of SPIE | 2008

Hot Spot Management with Die-to-Database Wafer Inspection System

Kohji Hashimoto; Satoshi Usui; Kenji Yoshida; Ichirota Nagahama; Osamu Nagano; Yasuo Matsuoka; Yuuichiro Yamazaki; Soichi Inoue

We constructed hot spot management flow with a die-to-database inspection system that is required for both hot spot extraction accuracy and short development turn-around-time (TAT) in low k1 lithography. The die-to-database inspection system, NGR-2100, has remarkable features for the full chip inspection within reasonable operating time. The system provided higher hot spot extraction accuracy than the conventional optical inspection tool. Also, hot spots extracted by the system could cover all killer hot spots extracted by electrical and physical analysis. In addition, the new hot spot extraction methodology employing the die-to-database inspection system is highly advantageous in that it shortens development TAT by two to four months. In the application to 65nm node CMOS, we verified yield improvement with the new hot spot management flow. Also, the die-to-database inspection system demonstrated excellent interlayer hot spot extraction from the viewpoint of LSI fabrication.


Archive | 1986

Automatic developing device

Takashi Tsuchiya; Yasuo Matsuoka


Archive | 1986

Automatic developing apparatus

Yasuo Matsuoka; Kinya Usuda; Michiro Takano


Archive | 1996

Apparatus for baking photoresist applied on substrate

Katsuhisa Mita; Yasuo Matsuoka; Kenichi Taniyama; Michirou Takano; Tsuneo Akasaki; Kaoru Kanda


Archive | 1991

Method and apparatus for creation of resist patterns by chemical development

Yasuo Matsuoka


Archive | 1988

Resist coating apparatus

Noboru Yamamoto; Yasuo Matsuoka


Archive | 1986

Pattern developing process and apparatus therefor

Hiroyuki Hasebe; Masayuki Suzuki; Yasuo Matsuoka; Takashi Tsuchiya; Kinya Usuda


Archive | 1998

Method for baking photoresist applied on substrate

Katsuhisa Mita; Yasuo Matsuoka; Kenichi Taniyama; Michirou Takano; Tsuneo Akasaki; Kaoru Kanda


Archive | 2011

IMPRINTING METHOD, SEMICONDUCTOR INTEGRATED CIRCUIT MANUFACTURING METHOD AND DROP RECIPE CREATING METHOD

Yasuo Matsuoka; Ryoichi Inanami; Akiko Mimotogi


Archive | 1986

Apparatus for forming a resist pattern

Yasuo Matsuoka

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