Ryoichi Inanami

Throughput enhancement strategy of maskless electron beam direct writing for logic device

A pattern design method for semiconductor circuits in logic device was developed, which realized an electron beam (EB) exposure with sufficient throughput. The number of EB shots can be decreased by repeating logic synthesis and P and R (place and route) by removing usable standard cells (SCs). By using the design method, a functional block with about 140 kGates could be generated with only 17 SCs, and the minimum number of EB shots was attained with 24 SCs. The increase in the total area of SCs and the consumed power of the chip was only 10%.

Cell library development methodology for throughput enhancement of character projection equipment

We propose a cell library development methodology for throughput enhancement of character projection equipment. First, an ILP (Integer Linear Programming)-based cell selection is proposed for the equipment for which both of the CP (Character Projection) and VSB (Variable Shaped Beam) methods are available, in order to minimize the number of electron beam (EB) shots, that is, time to fabricate chips. Secondly, the influence of cell directions on area and delay time of chips is examined. The examination helps to reduce the number of EB shots with a little deterioration of area and delay time because unnecessary directions of cells can be removed. Finally, a case study is shown in which the numbers of EB shots are shown for several cases.

Technology mapping technique for throughput enhancement of character projection equipment

The character projection is utilized for maskless lithography and is a potential for the future photomask manufacture. The drawback of the character projection is its low throughput and leads to a price rise of ICs. This paper discusses a technology mapping technique for enhancing the throughput of the character projection. The number of EB shots to draw an entire chip determines the fabrication time for the chip. Reduction of the number of EB shots, therefore, increases the throughput of character projection equipment and reduces the cost to produce ICs. Our technology mapping technique aims to reduce the number of EB shots to draw an entire chip for increasing the throughput of character projection equipment. Our technique treats the number of EB shots as an objective to minimize. Comparing with an conventional technology mapping, our technology mapping technique achieved 19.6% reduction of the number of EB shots without any performance degradation of ICs. Moreover, our technology mapping technique achieved 48.8% reduction of the number of EB shots under no performance constraints. Our technique is easy for both IC designers and equipment developers to adopt because it is a software approach with no additional modification on character projection equipment.

A character size optimization technique for throughput enhancement of character projection lithography

We propose a character size optimization technique to enhance the throughput of maskless lithography as well as photomask manufacture. The number of electron beam shots to draw the patterns of circuits is a dominant factor in the manufacture time and the cost for devices. Our technique is capable of drastically reducing them by optimizing the size of characters, which are the patterns to project and are placed on CP masks. Experimental results show that our technique reduced 72.0% of EB shots in the best case, comparing with the ad hoc character sizing

Aberration budget in extreme ultraviolet lithography

It seems that the actual EUV lithography tools will have aberrations around ten times larger than those of the latest ArF lithography tools in wavelength normalized rms. We calculated the influence of aberrations on the size error and pattern shift error using Zernike sensitivity analysis. Mask-induced aberration restricts the specification of aberration. Without periodic additional pattern, the aberration to form 22 nm dual-gate patterns was below 8 mλ rms. Arranging the periodic additional pattern relaxed the aberration tolerance. With periodic additional pattern, the aberration to form 22 nm patterns was below 37 mλ rms. It is important to make pattern periodicity for the relaxation of the aberration specification.

Maskless lithography: a low-energy electron-beam direct writing system with a common CP aperture and the recent progress

In order to realize SoC (System on a Chip) fabrication at low cost with quick-TAT (Turn-Around-Time) we have proposed a maskless lithography (ML2) strategy, a low-energy electron-beam direct writing (LEEBDW) system with a common character projection (CP) aperture. This paper presents a status report on our proof-of-concept (POC) system. We have developed a compact EB column consisting small electrostatic lenses and deflectors. The experimental results for our POC system indicated that the patterns corresponding to 50nm-node logic devices can be obtained with CP exposure at the incident energy of 5 keV. The technique to reduce the raw process time using a SEM function of LEEBDW system is also reported.

Edge Roughness Study of Chemically Amplified Resist in Low-Energy Electron-Beam Lithography Using Computer Simulation

We investigated the line edge roughness (LER) of chemically amplified resist (CAR) in the high-sensitivity resist process in low-energy electron beam lithography (LEEBL). We have confirmed that a sub-100 nm pattern having a small line edge roughness could be obtained at the exposure dose below sub-1 µC/cm2 for LEEBL. In order to explain the experimental results, we have proposed a resist exposure model, considering the generation yield and diffusion of secondary electrons (SEs). Based on the proposed model, we analyzed the LER for LEEBL using a simulation. When the beam blur and the acceptable LER were 30 nm (σ) and 2 nm (σ), the acceptable exposure doses for 2–5 keV and 50 keV were 0.3 µC/cm2 and 2.5 µC/cm2, respectively. This means that a high-sensitivity CAR process at the exposure dose below 0.5 µC/cm2 can be achieved in LEEBL.

Sub-100 nm pattern formation by roll-to-roll nanoimprint

Technologies for pattern fabrication on a flexible substrate are being developed for various flexible devices. A patterning technique for a smaller pattern of the order of sub-100 nm will be needed in the near future. Roll-to-roll Nano-Imprint Lithography (RtR-NIL) is promising candidate for extremely low-cost fabrication of large-area devices in large volumes. We have tried to transfer sub-100 nm patterns, especially sub-30 nm patterns, onto ultraviolet (UV) curable resin on film substrate by RtR-NIL. We demonstrate a 24 nm pattern on a film substrate by RtR-NIL and the methods potential for sub-100 nm patterning.

Throughput Enhancement in Electron Beam Direct Writing by Multiple-cell Shot Technique for Logic Devices

This paper reports a new pattern design method improving the throughput of the character projection electron beam direct writing (CP-EBDW) lithography for cell-based logic devices. The shot count decreases to approximately one fifth in a 90 nm CMOS technology by assembling the standard cells (SCs) in the physical design stage and exposing them at a time with multiple-cell shot technique. The operating frequency degradation of the logic devices is less than 5 %

Cell Library Development Methodology for Throughput Enhancement of Electron Beam Direct-Write Lithography Systems

We propose a cell library development methodology for throughput enhancement of electron beam direct-write (EBDW) systems. First, an ILP (integer linear programming)-based cell selection is proposed for EBDW systems in which both of the character projection (CP) and the variable shaped beam (VSB) methods are available, in order to minimize the number of electron beam (EB) shots, that is, time to fabricate chips. Secondly, the influence of cell directions on area and delay time of chips is examined. The examination helps to reduce the number of EB shots with a little deterioration of area and delay time because unnecessary directions of cells can be removed to increase the number of cells on a CP aperture mask. Finally, a case study is shown in which the numbers of EB shots are examined under several cases.