Yat-Hei Lam

Integrated Low-Loss CMOS Active Rectifier for Wirelessly Powered Devices

A low-loss CMOS full-wave active rectifier is presented. It consists of two dynamically biased and symmetrically matched active diodes each realized by an nMOS switch driven by a 2-ns voltage comparator with reverse-current control. With a load of 1.8-kOmega, the rectified dc voltage is 3.22 V and 1.2 V for a 13.56 MHz ac sinusoidal input voltage of 3.5 V and 1.5 V respectively. It is fabricated in a 0.35-mum CMOS process with an active area of 0.0055 mm 2, with no low-threshold devices and on-chip passive components

A 0.9V 0.35 μm Adaptively Biased CMOS LDO Regulator with Fast Transient Response

Portable applications often need multiple voltages controlled by a power management IC to power up many functional blocks. A switching pre-regulator is usually followed by a low dropout (LDO) regulator to provide a regulated power source for noise-sensitive blocks. The LDO regulator has to be stable for all load conditions and frequency compensation is usually needed to stabilize the regulation loop. The output voltage droop due to rapid and large load changes could be minimized with a fast regulation loop, such that functional blocks powered by the same LDO regulator would have low crosstalk noise. A low-voltage fast transient-response LDO regulator using an inexpensive 0.35 mum CMOS process is presented in this paper. It features a current-efficient adaptively biased regulation scheme using a low-voltage high-speed super current mirror and does not require a compensation capacitor. It is stabilized by a low-cost low-ESR ceramic filter capacitor of 1 muF The adaptively biased error amplifier EA drives a small transconductance cell to modulate the output current through a transient-enhanced super current-mirror (SCM).

A voltage-mode PWM buck regulator with end-point prediction

The end-point prediction (EPP) scheme for voltage-mode buck regulators is proposed. Internal nodal voltages of the regulator controller are predicted and set automatically by the proposed algorithms and circuits. The settling time of the regulator can therefore be significantly reduced for faster dynamic responses, even with dominant-pole compensation. Proven experimentally by a voltage-mode buck regulator implemented in a 0.35-/spl mu/m CMOS technology, the reference-tracking speed using the EPP scheme is faster than the conventional buck regulator by about six times.

Integrated charge-control single-inductor dual-output step-up/step-down converter

An integrated charge-control single-inductor dual-output step-up/step-down converter that works in pseudo-continuous conduction mode is presented. The supply voltage is from 1.8 V to 2.2 V, with one output being 1.6 V and the other 2.4 V. It was designed using a 0.35 /spl mu/m process, and achieves an efficiency of 92% at a total load current of 160 mA.

CMOS Bandgap References With Self-Biased Symmetrically Matched Current–Voltage Mirror and Extension of Sub-1-V Design

A series of bandgap references (BGRs) using a self-biased symmetrically matched current-voltage mirror (SM CVM) in reducing systematic offset, thus achieving an excellent line regulation, is presented. By replacing the operational amplifier with a CVM in the feedback loop, current consumption is much reduced. An SM buffer stage that is capable of driving a resistive load with minor degradation in temperature coefficient (TC) and line regulation is also presented. The technique is extended to design a sub-1-V BGR with a TC-cancellation output buffer. All circuits are designed using a 0.35- CMOS process, and experimental results are presented, confirming the analysis.

Integrated single-inductor dual-input dual-output boost converter for energy harvesting applications

An integrated single-inductor dual-input dual-output (SI DIDO) boost converter for energy harvesting applications was designed in a 0.35 mum CMOS process. It provides two regulated output voltages for the load and the charge storage device, and two sources, the energy harvesting source and the charge storage device, are multiplexed to serve as the input. The implementation has several special features. (1) The input power MUX is driven by an internal charge pump for a larger gate drive to save area. (2) The power stage is implemented with an active diode core to eliminate gate drive circuitry. (3) A 1:7 timeslot scheduling with a fixed peak inductor current is adopted to deliver energy to the two outputs with a large difference in load currents. The proposed converter could operate at IV with up to 85% efficiency at 200 mW.

An energy-adaptive MPPT power management unit for micro-power vibration energy harvesting

A batteryless power management unit (PMU) that manages harvested low-level vibration energy from a piezoelectric device for a wireless sensor node is presented. An energy-adaptive maximum power point tracking (EA-MPPT) scheme is proposed that allows the PMU to activate different operation modes according to the available power level. The harvested energy is processed by an ac-dc voltage doubler followed by on-chip charge pumps with variable up/down conversion ratios for higher efficiency. Interleaving technique is employed for the high-power output to reduce both current and voltage ripples. The PMU is designed using a 0.35mum CMOS process, and simulation results are presented to demonstrate its functions.

Adaptively-biased capacitor-less CMOS low dropout regulator with direct current feedback

A capacitor-less low dropout regulator (LDR) with direct current feedback is proposed. A symmetrically-matched voltage mirror in sensing the load current is employed, and gives excellent line and load regulations. The dynamic biasing results in an LDR with pole-tracking that extends the bandwidth of the loop gain at high load currents. The LDR was fabricated in a 0.35mum CMOS process with an active area of 0.11mm2, and measurement results corroborated well with both analysis and simulation

Integrated 0.9 V charge-control switching converter with self-biased current sensor

A charge-control non-inverting flyback converter that works in pseudo-continuous conduction mode is presented. Charge control is realized through the introduction of an integrated self-biased current sensor for fast response with a fully-matched structure for accuracy down to the mA range. The topology allows an output voltage of 1.2 V to be derived from a supply voltage of 1.5 V down to 0.9 V. The integrated converter is designed in a standard 0.18 /spl mu/ CMOS process. It switches at 500 kHz and exhibits excellent line-to-load transient response, with an efficiency of 91.3% at a load current of 200 mA.

Single-inductor dual-input dual-output switching converter for integrated battery charging and power regulation

A single-inductor dual-input dual-output switching converter is presented. This converter can be used in a battery power management system for portable equipment and requires only 5 integrated power devices and 1 external inductor for battery-charging, power multiplexing and voltage regulation. It is designed using a 0.6 /spl mu/m CMOS process. Simulation results demonstrated functionality and high efficiency of the converter.