Ye Tianchun

Effects of pattern characteristics on copper CMP

Copper chemical mechanical polishing (CMP) is influenced by geometric characteristics such as line width and pattern density, as well as by the more obvious parameters such as slurry chemistry, pad type, polishing pressure and rotational speed. Variations in the copper thickness across each die and across the wafer can impact the circuit performance and reduce the yield. In this paper, we propose a modeling method to simulate the polishing behavior as a function of layout pattern factors. Under the same process conditions, the pattern density, the line width and the line spacing have a strong influence on copper dishing, dielectric erosion and topography. The test results showed: the wider the copper line or the spacing, the higher the copper dishing; the higher the density, the higher the dielectric erosion; the dishing and erosion increase slowly as a function of increasing density and go into saturation when the density is more than 0.7.

Dummy fill effect on CMP planarity

With the use of a chemical-mechanical polishing (CMP) simulator verified by testing data from a foundry, the effect of dummy fill characteristics, such as fill size, fill density and fill shape, on CMP planarity is analyzed. The results indicate that dummy density has a significant impact on oxide erosion, and copper dishing is in proportion to dummy size. We also demonstrate that cross shape dummy fill can have the best dishing performance at the same density.

A novel 2.95?3.65 GHz CMOS LC-VCO using tuning curve compensation

This paper presents a new CMOS LC-VCO with a 2.95–3.65 GHz tuning range. The large tuning range is achieved by tuning curve compensation using a novel varactor configuration, which is mainly composed of four accumulation-mode MOS varactors (A-MOS) and two bias voltages. The proposed varactor has the advantages of optimizing quality factor and tuning range simultaneously, linearizing the effective capacitance and thus greatly reducing the amplitude-to-phase modulation (AM-PM) conversion. The circuit is validated by simulations and fabricated in a standard 0.18 μm 1P6M CMOS process. Measured phase noise is lower than –91 dBc at 100 kHz offset from a 3.15 GHz carrier while measured tuning range is 21.5% as the control voltage varies from 0 to 1.8 V. The VCO including buffers consumes 2.8 mA current from a 1.8 V supply.

An effective work-function tuning method of nMOSCAP with high-k/metal gate by TiN/TaN double-layer stack thickness

We evaluated the TiN/TaN/TiAl triple-layer to modulate the effective work function (EWF) of a metal gate stack for the n-type metal-oxide-semiconductor (NMOS) devices application by varying the TiN/TaN thick- ness. In this paper, the effective work function of EWF ranges from 4.22 to 4.56 eV with different thicknesses of TiN and TaN. The thinner TiN and/or thinner in situ TaN capping, the closer to conduction band of silicon the EWF is, which is appropriate for 2-D planar NMOS. Mid-gap work function behavior is observed with thicker TiN, thicker in situ TaN capping, indicating a strong potential candidate of metal gate material for replacement gate processed three-dimensional devices such as FIN shaped field effect transistors. The physical understandings of the sensitivity of EWF to TiN and TaN thickness are proposed. The thicker TiN prevents the Al diffusion then induces the EWF to shift to mid-gap. However, the TaN plays a different role in effective work function tuning from TiN, due to the Ta-O dipoles formed at the interface between the metal gate and the high-k layer.

Chemical Vapour Deposition Graphene Radio-Frequency Field-Effect Transistors

We report the dc and rf performance of graphene rf field-effect transistors, where the graphene films are grown on copper by using the chemical vapour deposition (CVD) method and transferred to SiO2/Si substrates. Composite materials, benzocyclobutene and atomic layer deposition Al2O3 are used as the gate dielectrics. The observation of n- and p-type transitions verifies the ambipolar characteristics in the graphene layers. While the intrinsic carrier mobility of CVD graphene is extracted to be 1200 cm2/Vs, the parasitic series resistances are demonstrated to have a serious impact on device performance. With a gate length of 1 μm and an extrinsic transconductance of 72 mS/mm, a cutoff frequency of 6.6 GHz and a maximum oscillation frequency of 8.8 GHz are measured for the transistors, illustrating the potential of the CVD graphene for rf applications.

Fabrication and Characterization of Si Nanocrystals Synthesized by Electron Beam Evaporation of Si and SiO2 Mixture

Silicon nanocrystals synthesized by electron beam (e-beam) evaporation of Si and SiO2 mixture are studied. Rutherford backscattering spectrometry of the as-deposited Si-rich silicon dioxide or oxide (SRO) thin film shows that after evaporation, the Si and SiO2 concentration is well kept, indicating that the e-beam evaporation is suitable for evaporating mixtures of Si and SiO2. The SRO thin films are annealed at different temperatures for two hours to synthesize silicon nanocrystals. For the sample annealed at 1050°C, silicon nanocrystals with different sizes and the mean diameter of 4.5 nm are evidently observed by high resolution transmission electron microscopy (HRTEM). Then the Raman scattering and photoluminescence spectra arising from silicon nanocrystals are further confirmed the above results.

The effects of process condition of top-TiN and TaN thickness on the effective work function of MOSCAP with high-k/metal gate stacks

We introduced a TaN/TiAl/top-TiN triple-layer to modulate the effective work function of a TiN-based metal gate stack by varying the TaN thickness and top-TiN technology process. The results show that a thinner TaN and PVD-process top-TiN capping provide smaller effective work function (EWF), and a thicker TaN and ALD-process top-TiN capping provides a larger EWF; here, the EWF shifts are from 4.25 to 4.56 eV. A physical understanding of the dependence of the EWF on the top-TiN technology process and TaN thickness is proposed. Compared with PVD-TiN room temperature process, the ALD-TiN 400 °C process provides more thermal budget. It would also promote more Al atoms to diffuse into the top-TiN rather than the bottom-TiN. Meanwhile, the thicker TaN prevents the Al atoms diffusing into the bottom-TiN. These facts induce the EWF to increase.

Design of two-terminal PNPN diode for high-density and high-speed memory applications

A vertical two-terminal silicon PNPN diode is presented for use in a high-density memory cell. The device design for high-speed operations was studied with experiments and calibrated simulations, which proves that the proposed memory cell can be operated at nanosecond range. The static and dynamic power dissipations were also studied, which indicated the availability of the proposed memory cell for VLSI applications. Moreover, the memory cell is compatible with CMOS process, has little impact from process variation, and has good reliability.

A constant loop bandwidth fractional-N frequency synthesizer for GNSS receivers

A constant loop bandwidth fractional-N frequency synthesizer for portable civilian global navigation satellite system (GNSS) receivers implemented in a 130 nm 1P6M CMOS process is introduced. Via discrete work- ing regions, the LC-VCO obtains a wide tuning range with a simple structure and small VCO gain. Spur suppression technology is proposed to minimize the phase offset introduced by PFD and charge pumps. The optimized band- width is maintained by an auto loop calibration module to adjust the charge pump current when the PLL output frequency changes or the temperature varies. Measurement results show that this synthesizer attains an in-band phase noise lower than -93 dBc at a 10 kHz offset and a spur less than -70 dBc; the bandwidth varies by 3% for all the GNSS signals. The whole synthesizer consumes 4.5 mA current from a 1 V supply, and its area (without the LO tested buffer) is 0.5 mm 2 .

Study on an Atmospheric Pressure Plasma Jet and its Application in Etching Photo-Resistant Materials

An atmospheric pressure radio-frequency plasma jet that can eject cold plasma has been developed. In this paper, the configuration of this type of plasma jet is illustrated and its discharge characteristics curves are studied with a current and a voltage probe. A thermal couple is used to measure the temperature distribution along the axis of the jet stream. The temperature distribution curve is generated for the He/O2 jet stream at the discharge power of 150 W. This jet can etch the photo-resistant material at an average rate of 100 nm/min on the surface of silicon wafers at a right angle.