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Dive into the research topics where Yeong-Shin Jang is active.

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Featured researches published by Yeong-Shin Jang.


custom integrated circuits conference | 2012

Non-load-balance-dependent high efficiency single-inductor multiple-output (SIMO) DC-DC converters

Young-Hun Ko; Yeong-Shin Jang; Seok-Kyun Han; Sang-Gug Lee

A single-inductor multiple-output (SIMO) DC-DC converter providing buck and boost outputs with a new control topology is presented. In the proposed switching sequence, which does not require any special blocks, energy delivery is always accomplished by flowing energy through an inductor, which leads to high conversion efficiency regardless of the balance between the buck and boost output loads. Implemented in 0.35-μm CMOS, the proposed SIMO DC-DC converter achieves high conversion efficiency regardless of the load balance between the outputs. The measured maximum efficiency reaches 82 % under heavy loads.


Journal of Semiconductor Technology and Science | 2014

Load-Balance-Independent High Efficiency Single-Inductor Multiple-Output (SIMO) DC-DC Converters

Young-Hun Ko; Yeong-Shin Jang; Sok-Kyun Han; Sang-Gug Lee

A single-inductor multiple-output (SIMO) DC-DC converter providing buck and boost outputs with a new switching sequence is presented. In the proposed switching sequence, which does not require any additional blocks, input energy is delivered to outputs continuously by flowing current through the inductor, which leads to high conversion efficiency regardless of the balance between the buck and boost output loads. Furthermore, instead of multiple output loop compensation, only the freewheeling current feedback loop is compensated, which minimizes the number of off-chip components and nullifies the need for the equivalent series resistance (ESR) of the output capacitor for loop compensation. Therefore, power conversion efficiency and output voltage ripples can be improved and minimized, respectively. Implemented in a 0.35- μm CMOS, the proposed SIMO DC-DC converter achieves high conversion efficiency regardless of the load balance between the two outputs with maximum efficiency reaching up to 82% under heavy loads.


IEEE Transactions on Power Electronics | 2016

A 200-V 98.16%-Efficiency Buck LED Driver Using Integrated Current Control to Improve Current Accuracy for Large-Scale Single-String LED Backlighting Applications

Baek-Min Lim; Young-Hun Ko; Yeong-Shin Jang; Ok-Hwan Kwon; Sok-Kyun Han; Sang-Gug Lee

This paper presents an average current mode buck dimmable light-emitting diode (LED) driver for large-scale single-string LED backlighting applications. The proposed integrated current control technique can provide exact current control signals by using an autozeroed integrator to enhance the accuracy of the average current of LEDs while driving a large number of LEDs. Adoption of discontinuous low-side current sensing leads to power loss reduction. Adoption of a fast-settling technique allows the LED driver to enter into the steady state within three switching cycles after the dimming signal is triggered. Implemented in a 0.35-μm HV CMOS process, the proposed LED driver achieves 1.7% LED current error and 98.16% peak efficiency over an input voltage range of 110 to 200 V while driving 30 to 50 LEDs.


IEEE Transactions on Circuits and Systems Ii-express Briefs | 2014

A 45-dB, 150-Hz, and 18-mW Touch Controller for On-Cell Capacitive TSP Systems

Yeong-Shin Jang; Young-Hun Ko; Jung-Min Choi; Hyoung Seok Oh; Sang-Gug Lee

A touch controller is proposed for on-cell capacitive touch screen panel systems, which adopts a newly proposed peaking noise detector and low-frequency rejection filters. Implemented in a 0.35-μmCMOS, the proposed touch controller with 3.3-V drive signal shows the maximum signal-to-noise ratio and scan rate of 45 dB and 150 Hz, respectively, while consuming 18 mW from a 3.3-V supply.


SID Symposium Digest of Technical Papers | 2010

P-181: A Charge-Share-Based Relative Read-Out Circuit for Capacitance Sensing

Yeong-Shin Jang; Kiuk Gwak; Sang-Sung Lee; Sang-Gug Lee; Ji-Hun Kim; Hyung-Seog Oh

A new charge share based relative read-out circuit is proposed. The proposed relative scheme reduces number of integrators by half and alleviates requirements of following blocks, which can make the system more power-efficient. Charge share scheme increases read-out circuits sensitivity by cancelling parasitic capacitance effects of I/O pad.


SID Symposium Digest of Technical Papers | 2010

P-58: A Differential Multi-bit/Conversion Cyclic DAC for TFT-LCD Column Drivers

Hoai-Nam Nguyen; Yeong-Shin Jang; Jeong-Yeol Bae; Huy-Binh Le; Sang-Gug Lee

A differential cyclic 10-bit DAC with multi-bit conversion per cycle architecture is presented. Passive conversion is done within 1μs and the output is driven during the rest of 1-H time. Designed in differential scheme, the switched-capacitor circuit is robust to charge injection, clock feedthrough and capacitive noise coupling. The DAC has been designed for a high voltage 0.18-μm CMOS technology.


Journal of Semiconductor Technology and Science | 2013

A Fast Low Dropout Regulator with High Slew Rate and Large Unity-Gain Bandwidth

Young-Hun Ko; Yeong-Shin Jang; Sok-Kyun Han; Sang-Gug Lee

A low dropout regulator (LDO) with fast transient responses is presented. The proposed LDO eliminates the trade-off between slew rate and unity gain bandwidth, which are the key parameters for fast transient responses. In the proposed buffer, by changing the slew current path, the slew rate and unity gain bandwidth can be controlled independently. Implemented in 0.18- ㎛ high voltage CMOS, the proposed LDO shows up to 200 ㎃ load current with 0.2V dropout voltage for 1㎌ output capacitance. The measured maximum transient output voltage variation, minimum quiescent current at no load condition, and maximum unity gain frequency are 24 ㎷, 7.5㎂, and higher than 1 ㎒, respectively.


international symposium on circuits and systems | 2011

A high linear low flicker noise 25% duty cycle LO I/Q mixer for a FM radio receiver

Jae Seung Lee; Chang-Jin Jeong; Yeong-Shin Jang; In-Young Lee; Sang-Sung Lee; Seok-Kyun Han; Sang-Gug Lee

In this paper, a low power, low flicker noise and high IIP3 I/Q mixer for 76–108MHz EURO/US/Korea/Japan FM radio receiver applications is presented. The proposed mixer includes a transconductance (Gm) stage, a current mode passive switching stage driven by a 25% duty cycle LO, a transimpedance amplifier (TIA), and a 25% duty cycle LO generator. Simulation results show a 9.2dB DSB noise figure at 50kHz, 13dBm IIP3, and 23dB voltage gain, respectively, while drawing only 800uA including a LO generator from a 1.2-V supply in a standard 65nm CMOS technology.


Archive | 2010

Digital feedforward sigma-delta modulator in analog-to-digital converter and modulation method thereof

Yeong-Shin Jang; Sang-Gug Lee; Seung-Tak Ryu


Archive | 2011

CIRCUIT FOR PROCESSING TOUCH LINE SIGNAL OF TOUCH SCREEN

Ji-Hun Kim; Young-bok Kim; Joon-Ho Na; Yeong-Shin Jang; Sang-Gug Lee

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