Yijiao Wang

Oxide-based RRAM switching mechanism: A new ion-transport-recombination model

This paper presents a unified physical model to elucidate the resistive switching behavior of metal-oxide-based resistive random access memory (RRAM) devices using the ion-transport-recombination model. In this model, the rupture of conductive filaments is caused by recombination of oxygen ions and electron-low-occupied oxygen vacancies. The transport equations of interstitial oxygen ions in the oxide matrix are introduced to quantitatively investigate the reset speed and other properties such as uniformity, endurance, and reset current. The proposed mechanism was verified by experiments.

Physical mechanisms of endurance degradation in TMO-RRAM

We report, for the first time, three types of endurance failure behaviors in TMO based RRAM. New physical mechanisms are proposed to clarify the physical origins of these endurance failures. A physically-based optimized switching mode is developed to improve the endurance of TMO-RRAM. A significantly enhanced endurance of >10⁹ switching cycles was demonstrated in the HfO<inf>x</inf>/TiO<inf>x</inf>/HfO<inf>x</inf>/TiO<inf>x</inf> devices.

Oxide-based RRAM: Unified microscopic principle for both unipolar and bipolar switching

A unified microscopic principle is proposed to clarify resistive switching behaviors of transition metal oxide based resistive random access memories (RRAM) for the first time. In this unified microscopic principle, both unipolar and bipolar switching characteristics of RRAM are correlated with the distribution of localized oxygen vacancies in the oxide switching layer, which is governed by the generation and recombination with dissociative oxygen ions. Based on the proposed microscopic principle, an atomistic simulation method is developed to evaluate critical memory performance, and successfully conduct the device optimization. The experimental data are well in line with the developed simulation method.

A Novel Operation Scheme for Oxide-Based Resistive-Switching Memory Devices to Achieve Controlled Switching Behaviors

A new operation scheme on oxide-based resistive-switching devices [resistive random access memory (RRAM)] is proposed to improve the controllability of switching processes in order to achieve an improved memory performance. The improved device-to-device and cycle-to-cycle uniformity, reduced RESET current, and adjustable RHRS/RLRS ratio are demonstrated in the HfOx-based RRAM devices by using the new operation scheme, indicating the validity of the new operation scheme. The physical mechanism accounting for the new operation scheme effect is discussed.

Analysis of the Voltage-Time Dilemma of Metal Oxide-Based RRAM and Solution Exploration of High Speed and Low Voltage AC Switching

In this paper, the ac electrical characteristics of metal oxide-based resistive random access memory are investigated based on a developed compact model and the experiment. The voltage-time dilemma phenomenon and the impacts of critical factors on resistive switching speed are addressed. Based on predictions of the model, the small parasitic capacitance, low target high resistance, and large thermal resistance are beneficial to accelerate the resistive switching speed both in SET and RESET processes. The high SET speed and low SET voltage can be achieved by tuning the activation energy of oxygen vacancies. While for the RESET process, the barriers of the release of oxygen ions from electrode and the hopping in resistive switching layer should be turned down simultaneously for high switching speed and low operation voltage.

Oxygen-Vacancies-Related Room-Temperature Ferromagnetism in Polycrystalline Bulk Co-Doped TiO2

Room-temperature ferromagnetism (RTFM) is observed in the bulk Co x Ti 1 - x O 2 - δ (0.06 ≤ x ≤ 0.1) samples synthesized by the solid-state reaction method for the mixed powder of Ti and Co oxides, followed by a 500°C furnace annealing process in a 10% hydrogen-argon mixture of ambient gases. The X-ray diffraction, X-ray photoelectron spectroscopy, and measurements of magnetic susceptibility, Χ, vs temperature, T, indicate polycrystalline Co-doped TiO 2 anatase without Co clusters was fabricated. A phase transformation from CoTiO 3 to Co x Ti 1 - x O 2 - δ occurs after the hydrogenation process. These results are strong indications for formation of oxygen vacancies near the high spin Co 2 + sites, and the formed oxygen vacancies are essential for the generation of RTFM in Co x Ti 1 - x O 2 - δ . Based on these observations, ferromagnetism in bulk Co x Ti 1 - x O 2 - δ anatase could be attributed to the exchange interaction between Co 2 + mediated by oxygen vacancies near Co 2 + sites, not being caused by Co clusters.

Impact of random discrete dopant in extension induced fluctuation in gate–source/drain underlap FinFET

In this work, three dimensional technology computer-aided design (TCAD) simulations are performed to investigate the impact of random discrete dopant (RDD) including extension induced fluctuation in 14 nm silicon-on-insulator (SOI) gate–source/drain (G–S/D) underlap fin field effect transistor (FinFET). To fully understand the RDD impact in extension, RDD effect is evaluated in channel and extension separately and together. The statistical variability of FinFET performance parameters including threshold voltage (Vth), subthreshold slope (SS), drain induced barrier lowering (DIBL), drive current (Ion), and leakage current (Ioff) are analyzed. The results indicate that RDD in extension can lead to substantial variability, especially for SS, DIBL, and Ion and should be taken into account together with that in channel to get an accurate estimation on RDF. Meanwhile, higher doping concentration of extension region is suggested from the perspective of overall variability control.

Random interface trap induced fluctuation in 22nm high-k/metal gate junctionless and inversion-mode FinFETs

The impact of random interface trap (RIT) on the junctionless MOSFET (JL-FET) is investigated. Both acceptor-like and donor-like interface traps are considered to 22nm high-k metal gate (HKMG) junctionless structure and traditional inversion-mode FinFET. Fluctuations in threshold voltage, on current, leakage current, drain induced barrier lowering and subthreshold swing are analyzed. The results show that the position effect and type of interface traps (ITs) can induce different fluctuation for JL-FET and FinFET.

Investigation of self-heating effect in SOI-LDMOS by device simulation

Self-heating effect in SOI-LDMOS power devices has become a repeated discussion as the active silicon layer thickness is reduced and buried oxide layer thickness is increased. Heat dissipation and the self-heating effect become critical issues of SOI power devices. In this paper, simulations of self-heating effect under different thermal boundary conditions are performed. The influence of difference device parameters, including BOX (Buried OXide) thickness, trench length, SOI (Silicon On Insulator) thickness, source/drain lumped surface thermal resistance, are simulated to investigate their impact on self-heating effect. The work is intended to provide reference for device design and the optimization of source/drain contact in consideration of self-heating effect.

Time dependent 3-D statistical KMC simulation of high-k degradation including trap generation and electron capture/emission dynamic

A comprehensive time dependent three dimensional simulation framework for high-k degradation is developed. In this framework, the models that account for trap generation in high-k, capture/emission dynamic, and statistical variability are incorporated in the simulation. The influence of the trap generation model on distribution of traps, threshold voltage, and the amount of trapped charge is investigated in detail, thereby lay a solid foundation for predicting more accurate design margins at circuit/system level in the future.